USB 2.0 ?
Rayman
Posts: 13,860
I remembered this from the Silicon thread a took a look for a PHY...
I was just looking at USB3250... With P2 at 180 MHz, I think it should be possible to do a USB 2.0 interface using this $1 chip... The USB 2.0 protocol is the same as USB 1, so code should be easy to adapt... Can use an 8-bit bus at 60 MHz for the transfers...
Hard part looks to be syncing to an external 60 MHz data clock. But, with P2 at 180 MHz, maybe it can work?
WOW !!!
...and what kind of USB performance could be achieved at 280MHz :-)
Still 12MHz ? - as that's the USB clock speed.
The next step of 480MHz is well outside P2 ability, but maybe someone will connect a HS-USB PHY to a P2 one day ?
It would be quite interesting to load the USB code, and ramp the SysCLK, and see how clk tolerant the USB code is. (FPGA tested at 80MHz)
I was just looking at USB3250... With P2 at 180 MHz, I think it should be possible to do a USB 2.0 interface using this $1 chip... The USB 2.0 protocol is the same as USB 1, so code should be easy to adapt... Can use an 8-bit bus at 60 MHz for the transfers...
Hard part looks to be syncing to an external 60 MHz data clock. But, with P2 at 180 MHz, maybe it can work?
Comments
Now there is silicon, one interesting test would be to feed 60MHz into xtal for the pll.
I wonder what the XI to outedge phase delta then is ?