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Parallax Propeller 2 Form Factor and DIP version


Can anybody tell yet what form factor the Propeller 2 will be?

How about a DIP version?

Assembler Novice

All round good guy

Comments

  • 23 Comments sorted by Date Added Votes
  • Mike GreenMike Green Posts: 22,717
    edited May 13 Vote Up0Vote Down
    No DIP version ... too many pins. The P2 requires 100 pins and has a chip size really too large for DIP packaging. See this thread (and others) for package drawings.

    The plan from early on was to have some sort of breakout board as well as something like the Activity Board, maybe something like a FLIP module with regulators, crystal, EEPROM or SD card ... the P2 can boot from several sources.


  • So.Has anybody gotten prototypes from Parallax to evaluate?

    It's common practice with the 100 pin devices to have a breakout board

    so you can get a socket and solder the socket to your design.

    Assembler Novice

    All round good guy
  • The final silicon has not been made yet.
    Infernal Machine

  • They have not run off any rough ones for us to test?

    Then give them feedback?

    Assembler Novice

    All round good guy
  • There are several threads in the Propeller 2 forum that serve to keep us all informed on the status of the Propeller 2. I suggest you start looking through them. On Semi is the foundry making the chips for Parallax. It will be some weeks before Parallax gets the "test run". Parallax has posted the FPGA code for the P2, so you can already evaluate the instruction set, etc.
  • The package is a TQFP100. See Wikipedia for discussion. The FPGA code (and emulator) is being used for development of the software to be included in the P2 ROM including boot code and a Forth (Tachyon) monitor/debugger.

  • Thank you.

    Let me try another tack.

    Is the editor out yet?

    Propeller 2 Editor.

    Assembler Novice

    All round good guy
  • PublisonPublison Posts: 10,067
    edited May 13 Vote Up0Vote Down
    Thank you.

    Let me try another tack.

    Is the editor out yet?

    Propeller 2 Editor.

    Not yet. Spin2 and assembler tools will start after silicon is cast. We have several weeks before a test chip gets back.
    Infernal Machine
  • Again, read through this thread for information on coding for the P2 using the FPGA emulator and various tools (like PropGCC for the P2). The Spin/Asm -> P1 and C/C++ -> P1 compilers are being modified to optionally generate P2 code with testing done using the P2 emulator. The editors (PropellerIDE and SimpleIDE) are just open source code editors modified to handle the appropriate Propeller syntax and interface to the compilers / loaders.
  • microcontrollerusermicrocontrolleruser Posts: 940
    edited May 13 Vote Up0Vote Down
    Could you put me on the list for 2 or 4 chips please?

    No charge evaluation ones please.

    Then I won't charge you if they fry one of my nice power supplies or something.

    The 100pin TQFP ones.

    Assembler Novice

    All round good guy
  • There's no "this". The people already volunteering time and energy working on development tools will likely get development boards so they can get right to work testing the "real chip" against the FPGA emulated version without worrying about power supplies, clock sources, pull-ups, etc. The bare chips probably won't be for sale for some time after the chip is deemed "stable".

  • Good proofreading.

    'the list' not 'this'.

    FPGA's? No. I am not adding a layer of complication to this.

    Just curious about the new Propeller.

    Okay,How about a datasheet for the Propeller 2?

    Assembler Novice

    All round good guy
  • Good proofreading.

    'the list' not 'this'.

    FPGA's? No. I am not adding a layer of complication to this.

    Just curious about the new Propeller.

    Okay,How about a datasheet for the Propeller 2?

    Like Mike says, you need to read the P2 threads:
    https://forums.parallax.com/categories/propeller-2-multicore-microcontroller

    You have to catch up with 6+ years of evolution.
    Infernal Machine
  • Dave HeinDave Hein Posts: 5,453
    edited May 13 Vote Up0Vote Down
    Okay,How about a datasheet for the Propeller 2?
    Click on this link -- https://forums.parallax.com/discussion/162298/prop2-fpga-files-updated-6-april-2018-version-32b/p1
    Scroll down to where it says "DOCUMENTATION"
    Click on each of the two links and read the documents
    Ask more questions about the P2 after you've read the two documents
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 21,898
    edited May 13 Vote Up0Vote Down
    I would recommend learning all about the P1 and programming it before even attempting to grok the additional features and complications of the P2. IOW, don't put the cart before the horse. You'll have plenty of time before the P2 is ready for market. Going directly from PIC/SX to the P2 is a huge leap without the necessary context of P1 experience!

    -Phil
    “Perfection is achieved not when there is nothing more to add, but when there is nothing left to take away. -Antoine de Saint-Exupery
  • Peter JakackiPeter Jakacki Posts: 7,267
    edited May 14 Vote Up0Vote Down
    Could you put me on the list for 2 or 4 chips please?

    No charge evaluation ones please.

    Then I won't charge you if they fry one of my nice power supplies or something.

    The 100pin TQFP ones.


    Don't confuse the members on the forum with the company, and don't confuse the family run company with huge corporations. There are no "samples" however Parallax is happy to sell us chips when they become available for a paltry sum of a few dollars instead of having to pay the megabucks that it costs them. As for "nice power supplies", if we manage to blow them up somehow then that has never been anything to do with anybody but the user and the power-supply manufacturer although I certainly hope you spoke in jest. BTW, did the power-supply company give you those as "samples"? :)

    Think of the P2 project a bit like crowd funding but instead of funding we the crowd have been contributing to the design and tools and documentation of Chip Gracey's creation. I don't know of any company that shares and welcomes input, being able to test a chip in FPGA before the final silicon product etc. Read the documentation by all means but even for us P1 experts the P2 is a big leap. If I were you I wouldn't go there until the tools and documentation are "mature". In the meantime, learn about P1 and that will help you a little when the time comes in a year (or 2 or 3) when there is a bit more finish on the support and evaluation boards and sample code as well as OBEX .
    Tachyon Forth - compact, fast, forthwright and interactive
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  • There are break out boards available for tqfp 100 parts that will probably work for the p2.
    Particularly patient proactive practice positively predicates practically precise poly-processor Parallax Propeller programming paradigms.

    .
  • Ditto Publison, Dave, Phil, and Peter. The P2 project began with the P1 and suggestions for improving it. Some just wanted more memory and cogs. Some wanted a few additional instructions like the multiply and divide that were originally intended for the P1, but never made it. Others had more rarified changes in mind. The CORDIC engine would allow high speed calculations like multiply and divide, but would also provide for trig and other transcendental functions. P2 got the ability to execute code directly from hub memory and features to support emulation of other instruction sets and interpreters. Then there were the smart I/O pins which allow offloading of various functions to the I/O pin circuitry from a cog. Each one of these areas has history associated with it that you need in order to understand why the feature was added and what sorts of things it should help solve.
  • jmgjmg Posts: 11,431
    There are break out boards available for tqfp 100 parts that will probably work for the p2.

    Not the simplest ones as you need a EPAD Breakout.

    There are custom ones like
    https://www.ebay.com/itm/2-piecs-TQFP-100-TQFP100-0-5-mm-pitch-DIP-Adapter-PCB-SMD-convert-PIC24-MCU-/141895830900
    or
    https://www.ebay.com/p/2-TQFP-EQFP-LQFP-176-100-Pin-0-5mm-to-DIP-Adapter-PCB-Board-Converter-Gold-B90/2175184175

    but given the special Power, Clock & decoupling needs of a P2, you really are best designing a specific breakout, anything less is going to be a time sink, and you'll never be sure about ti...

    I'd imagine the first P2 breakouts would be done 4 layers, and as that reference point is proven, 2 layers might be possible.

    For P2 testing, a Si5351A takes very little PCB space, but allows any SysCLK in, and a TCXO footprint for a GPS oscillator would allow sub ppm precision.

    Regulators will need careful selection, but one that allows supply voltage change would be great for testing - maybe TPS62356 ? or equiv ?
  • WBA ConsultingWBA Consulting Posts: 2,764
    edited May 14 Vote Up0Vote Down
    jmg wrote: »
    ......but given the special Power, Clock & decoupling needs of a P2, you really are best designing a specific breakout, anything less is going to be a time sink, and you'll never be sure about ti...
    I'd imagine the first P2 breakouts would be done 4 layers, and as that reference point is proven, 2 layers might be possible.

    Definitely agree that a dedicated, properly planned out breakout board with all appropriate support components for basic use will be mandatory for early success of the P2. This will also require at least a fundamental datasheet for the P2, code examples, full details for support circuit design criteria, and a few example applications. Without these things, early adoption of the P2 will be limited to the dozen or so folks currently playing with P2 on FPGA boards.

    Parallax is fully aware of how proper documentation and learning support can make or break a product. Once a live P2 chip is "blessed", Parallax will have to make some expensive hiring decisions to support the wave of needs to make the P2 successful when released into the wild. The S2, S3, FLiP, Blockly, Prop Activity board, and BOE-Bot products are good examples of where Parallax made a lot of the right decisions during launch, so they are capable of doing the same for P2.

  • Can anybody tell yet what form factor the Propeller 2 will be?

    How about a DIP version?

    My guess is someone will make a prob2 board in a small profile with headers for the GPIO. That should be close enough for most purposes. Most especially if there's an open source design for it. (The p2 may not be open source, but that should not necessarily effect a board for it.
    Particularly patient proactive practice positively predicates practically precise poly-processor Parallax Propeller programming paradigms.

    .

  • They should produce a less pin count version in a DIP.

    No charge for that idea Parallax!

    I really should start charging them a consulting fee!

    That idea there will probably make them who knows. I am not an accountant.

    Assembler Novice

    All round good guy
  • jmgjmg Posts: 11,431
    edited May 25 Vote Up0Vote Down
    My guess is someone will make a prob2 board in a small profile with headers for the GPIO. That should be close enough for most purposes. Most especially if there's an open source design for it. (The p2 may not be open source, but that should not necessarily effect a board for it.

    There is sure to be 0.1" boards, of more than one type.

    Some examples of what is already out there (besides RaspPi header and Ardunio) are these ( all these have Debug support on-board)

    SK-FM3-48PMC-USBSTICK.JPG

    SLTB005A.jpg

    and at 100 pins

    nutiny-nuc126v.jpg

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