GETRND question

Is the GETRND instruction supposed to return a random bit pattern like the old P2-Hot GETLFSR instruction?
CCCC 1101011 CZ0 DDDDDDDDD 000011011        GETRND  {D}         {WC,WZ}

All attempts to use this instruction returns the same value of $9BDC_06A7

Comments

  • Ah, there is some configuration needed to turn it on. I'm not in front of my computer, but try doing 'COGID ##$400' at the start of your program. Maybe add 'WC' if that doesn't work.

    Eventually, the loader will take care of this.
  • I tried that Chip, no change in behaviour.
  • Try ##$200 and #$100 before the ##$400.
  • Still no change.
  • ozpropdev wrote: »
    Still no change.

    I'll be back home soon and I'll see what needs to be done. For now, try COGID with ascending values $20, $40, $80,... $400.

  • So COGID has some undocumented configuration function? Is this only for the random number generator, or are other things configured with COGID?
  • It will be documented.

    COGID is used to test the 32-bit counter, among other things.
  • fuses and other secure boot things were similarly configured in the hot chip
  • SeairthSeairth Posts: 2,471
    edited 2015-11-28 - 19:36:22
    cgracey wrote: »
    It will be documented.

    COGID is used to test the 32-bit counter, among other things.

    Seems like COGID needs to be renamed....

    Edit: or, more realistically, some aliases.
  • cgracey wrote: »
    ozpropdev wrote: »
    Still no change.

    I'll be back home soon and I'll see what needs to be done. For now, try COGID with ascending values $20, $40, $80,... $400.
    Tried all combinations, no change.

  • Ozpropdev, would you mind if I resolved this on Monday morning? We got back from travelling and I'm a lot more tired than I thought I'd be. The shop is probably freezing and I'm in the warm house, falling asleep.
  • cgraceycgracey Posts: 13,125
    edited 2015-11-30 - 19:25:24
    I found the problem. A COGID instruction was being issued by the cog boot ROM and it had bit 10 set in D, which was causing the fuses to be hidden and the test modes for CNT and RND to become inaccessible. This left RND's LFSR uninitialized, holding $00000000.

    I will fix this in the next FPGA release. Sorry about this.
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