Ruminations while awaiting an FPGA image (was "Hello...... Anyone out there?")

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Comments

  • SRLMSRLM Posts: 5,045
    edited 2014-08-06 - 12:51:42
    The code would be really great for upper course education at colleges and universities. I had to take 3.5* courses on VHDL and chip design. Parallax could penetrate that market very well if they included educational material and hardware.

    * 2.5 because one of them was really big

    My suggestion:

    - Choose a good digital design book. There's too much content for Parallax to write it all.
    - Write additional educational material that supports the book with the Propeller architecture. My advice would be to make it in a "lab" format.
    - Provide additional hardware (PCBs, etc.) that help expand on a particular FPGA board.

    Professors would love the real world example, and TA's would appreciate the premade lab material.

    Actually, just writing this out sounds exciting to me. If I were still in school I think I'd try to get out my regular lab assignments by proposing a Propeller1 modification project.
  • Ken GraceyKen Gracey Posts: 6,755
    edited 2014-08-06 - 12:57:04
    Congratulations & Thanks!

    I know what I'll be loading onto one of my DE0's soon...

    Ken, get this up on opencores.org facebook and tweet it!

    We are working on it - there's only a few of us and each of these steps takes a bit of time.

    Ken Gracey
  • Bill HenningBill Henning Posts: 6,445
    edited 2014-08-06 - 12:58:06
    By all means, an announcement on the P1 forum!

    HOWEVER

    I think "Propeller 1 Verilog" is a great name for a new forum here...
    potatohead wrote: »
    @Ken: Let's abandon this thread right now. Maybe people can delete posts. Or our moderators can just hide a few things in the interest of everybody landing in the right place. I sure don't mind. Do others?

    Start another one in the P1 Forum, and put the text of what you do know right now, and if you've got them, the links to the release pages to appear soon. Several of us can comment there, and we can make submissions to various places. I'll do Hackaday, though somebody like OBC might have more cred there, and Slashdot for sure. Others can drop things in tip lines, and a few of us doing that today will get the word out.

    I'll do Twitter, FB as well as write a few posts in places I hang out. That can get done later today.

    I won't post on this thread again. Looking forward to additional chatter on the new one. IMHO, that's the best way to avoid Google sticking on the early discussion. Those links from other sites will bury whatever bits you are concerned about here.

    I suggest we all use whatever post you make Ken as the basis for our submissions to various places. You can update it as the web team finalizes things.
  • cgraceycgracey Posts: 12,809
    edited 2014-08-06 - 13:00:19
    David Betz wrote: »
    Nice! How much of a P1 fits on the DE0-Nano?


    The entire P1 fits into 2/3 of the DE0-Nano's logic fabric. I had to eliminate the character ROM that sits between $8000..$BFFF, though, to make it fit the DE0-Nano's memory. There's room to grow the logic by 50%!
  • markmark Posts: 252
    edited 2014-08-06 - 13:04:54
    Ken Gracey wrote: »
    Can one of you guys please get this on Hackaday for us, as you see it?

    I submitted a tip to HaD as soon as I saw the announcement. Though it would probably be helpful if more people also sent a tip.
  • Ken GraceyKen Gracey Posts: 6,755
    edited 2014-08-06 - 13:14:04
    potatohead wrote: »
    @Ken: Let's abandon this thread right now for this subject, and P2 ruminations can continue unabated.

    Agreed: please use this thread http://forums.parallax.com/showthread.php/156773-Open-Propeller-Project-6-Open-Source-Verilog-for-Propeller-1?p=1283788#post1283788 instead so we don't create a legacy post of confusion.

    Ken Gracey
  • Cluso99Cluso99 Posts: 16,263
    edited 2014-08-06 - 13:21:02
    I think the code should only be available on the Parallax website.
    That way Parallax is likely to get many follow-on orders for the FPGA boards.
  • jmgjmg Posts: 14,375
    edited 2014-08-06 - 13:57:38
    I think "Propeller 1 Verilog" is a great name for a new forum here...

    Yes, I think this needs a new separate forum.
    It also needs links to the matching open tool chains for ASM and C flows.

    Chip could start a new P2 FPGA thread in here, as this one has morphed a little...
  • jmgjmg Posts: 14,375
    edited 2014-08-06 - 14:02:50
    Cluso99 wrote: »
    I think the code should only be available on the Parallax website.
    That way Parallax is likely to get many follow-on orders for the FPGA boards.

    Opencores is quite a good educational search node, and if all Source code has Parallax web links, for the Parallax repositries and support forums, that should be OK.

    I would imagine quite a few Target-Device builds will follow & be posted. (Xilinx/Lattice/Cyclone V)
    Code download is done rarely, it is the forums people come back to.

    A Cyclone V build for the lowest cost FPGA board (BEMicro CV) is a no-brainer.
  • cgraceycgracey Posts: 12,809
    edited 2014-08-06 - 14:50:35
    jmg wrote: »
    Opencores is quite a good educational search node, and if all Source code has Parallax web links, for the Parallax repositries and support forums, that should be OK.

    I would imagine quite a few Target-Device builds will follow & be posted. (Xilinx/Lattice/Cyclone V)
    Code download is done rarely, it is the forums people come back to.

    A Cyclone V build for the lowest cost FPGA board (BEMicro CV) is a no-brainer.


    All that would require is a unique top.qsf file to assign the device and pins. The rest just compiles along.
  • Heater.Heater. Posts: 21,233
    edited 2014-08-06 - 15:02:32
    Good grief!

    I have been reading and posting on this forum for years like a demented monkey or spam bot.

    I go out for a couple of hours for a beer and come back to find 6 new pages in this thread. And I have no idea what happened!

    Am I dreaming or did Parallax just release the Verilog files for the P1 as open source?

    If so this is mind bendingly HUGE. It's a world first. It's the first time ever one can buy, make or hack actual Open Source hardware based on an MCU.

    It is not that "fake" Open Source hardware people think they get with Arduinos and the like.

    Pinch me. I'm either dreaming or drunk.
  • Heater.Heater. Posts: 21,233
    edited 2014-08-06 - 15:18:52
    Oh right, I am drunk but my dream is true anyway.

    Parallax guys, I don't understand you.

    Why is news of this release not on the front page of parallax.com?

    Why are the verilog sources not in github?
  • jazzedjazzed Posts: 11,803
    edited 2014-08-06 - 15:30:06
    Heater. wrote: »
    Why is news of this release not on the front page of parallax.com?

    It is now.

    And the Download also includes the DE2-115 emulation now.

    Github? Later maybe. It is after all open-source.

    We should move this discussion to that other thread as @potatohead suggested.
  • Ken GraceyKen Gracey Posts: 6,755
    edited 2014-08-06 - 15:40:29
    jazzed wrote: »
    It is now.

    And the Download also includes the DE2-115 emulation now.

    Github? Later maybe. It is after all open-source.

    We should move this discussion to that other thread as @potatohead suggested.

    How about right here for discussion http://forums.parallax.com/showthread.php/156773-Open-Propeller-Project-6-Open-Source-Verilog-for-Propeller-1

    And, we should really work together to properly locate any new FPGA variants people produce. Let's avoid getting them scattered all over the internet, if possible.

    Ken Gracey
  • David BetzDavid Betz Posts: 14,019
    edited 2014-08-06 - 15:47:41
    Ken Gracey wrote: »
    How about right here for discussion http://forums.parallax.com/showthread.php/156773-Open-Propeller-Project-6-Open-Source-Verilog-for-Propeller-1

    And, we should really work together to properly locate any new FPGA variants people produce. Let's avoid getting them scattered all over the internet, if possible.

    Ken Gracey
    That's where github could be useful. People could create branches for variants and all of the code would be hosted in the same repository.
  • jmgjmg Posts: 14,375
    edited 2014-08-06 - 16:35:07
    Heater. wrote: »
    If so this is mind bendingly HUGE. It's a world first. It's the first time ever one can buy, make or hack actual Open Source hardware based on an MCU.

    Not quite - there have been FPGA Sources for Z80, 8051 etc for many years now.
    This may be the first time a Chip Vendor has released such source.
  • jmgjmg Posts: 14,375
    edited 2014-08-06 - 16:36:16
    Ken Gracey wrote: »
    And, we should really work together to properly locate any new FPGA variants people produce. Let's avoid getting them scattered all over the internet, if possible.

    Significant variants should ideally have their own forum stubs, so that would naturally collect them on here.
  • jmgjmg Posts: 14,375
    edited 2014-08-06 - 16:39:19
    Heater. wrote: »
    Parallax guys, I don't understand you.

    Why is news of this release not on the front page of parallax.com?

    This is a special niche targeted release, probably best not to confuse the main market ?
    Only a small subset of their customers will want or know what to do with Verilog code, so it does help to 'manage expectations' and limit diversions.
  • Ken GraceyKen Gracey Posts: 6,755
    edited 2014-08-06 - 16:45:45
    jmg wrote: »
    This is a special niche targeted release, probably best not to confuse the main market ?
    Only a small subset of their customers will want or know what to do with Verilog code, so it does help to 'manage expectations' and limit diversions.

    That's right. It's a news item and not a general purpose consumable for everybody. It'll be replaced in a few days. However, it is big news even though only a small number of people will actually run this on an FPGA.

    Ken Gracey
  • David BetzDavid Betz Posts: 14,019
    edited 2014-08-06 - 16:48:57
    jmg wrote: »
    Not quite - there have been FPGA Sources for Z80, 8051 etc for many years now.
    This may be the first time a Chip Vendor has released such source.
    I got STMicroelectronics to release the RTL for the VM Labs MPE processor and in fact the entire Nuon DVD chip. However, I couldn't get them to sign something making it official and I was nervous about releasing it based only on an email chain.
  • John A. ZoidbergJohn A. Zoidberg Posts: 514
    edited 2014-08-06 - 17:44:24
    I've just seen that P1 is open-source - so is it OK for me to stamp the Verilog code into my Cyclone4 board I have? I do not have a DE0 or whatever, but is it OK also for me to modify the P1 core inside, like adding FPU, improving the video driver and the such?

    Still, it's a very good news - I may need that for my work. :)
  • Ken GraceyKen Gracey Posts: 6,755
    edited 2014-08-06 - 18:24:49
    I've just seen that P1 is open-source - so is it OK for me to stamp the Verilog code into my Cyclone4 board I have? I do not have a DE0 or whatever, but is it OK also for me to modify the P1 core inside, like adding FPU, improving the video driver and the such?

    Still, it's a very good news - I may need that for my work. :)

    Of course!

    Ken Gracey
  • Heater.Heater. Posts: 21,233
    edited 2014-08-06 - 18:26:39
    Ken,
    And, we should really work together to properly locate any new FPGA variants people produce. Let's avoid getting them scattered all over the internet, if possible.
    I see what you mean Ken. But really, let it free. This should be in a Parallax github repo. From there it will be found and cloned and scattered all over the globe. That is how it should be. That is what Free Software is about. If that is not appealing to you then why do it at all?


    I don't think you should worry about people creating their own weird and wonderful variations. If they are serious about what they do they will offer their changes back to you. If those changes are sensible and useful you will pull them in to the main line of yours. If not, ah well. That is how the Free Software world works. If anybody ever makes an actual chip out of the new versions, who knows?


    jmg,
    Not quite - there have been FPGA Sources for Z80, 8051 etc for many years now.
    This may be the first time a Chip Vendor has released such source.
    Sorry yes that is what I meant, from the vendor itself.


    John A. Zoidberg,
    ...is it OK also for me to modify the P1 core inside, like adding FPU, improving the video driver and the such?
    It's released under the GPL. Go crazy do what you like. But if you give your resulting binary to anyone you have to pass on the source code it came from if they ask for it.
  • TorTor Posts: 1,999
    edited 2014-08-07 - 06:19:59
    Heater. wrote: »
    Excellent David, thank. I had never heard of Icarus Verilog.
    Heater,

    IIRC you're a Debian user.. if so, apt-get install iverilog (works for me. Seems to be up-to-date too)

    -Tor
  • Heater.Heater. Posts: 21,233
    edited 2014-08-07 - 06:31:36
    Tor,

    I was thinking about doing that when I get some free time today. Do you have some instructions to get the p1 verilog running under iverilog.
  • cgraceycgracey Posts: 12,809
    edited 2014-08-07 - 07:12:42
    Icarus Verilog requires certain formatting that is a pain to follow. As I recall, a module's interface connection list must not contain input/output keywords, if Icarus is going to be an effective lint tool. Those data have to be listed in a redundant-looking list that follows. Also, all variable declarations must precede their use. Sounds simple, but these things cause your code to get diluted and spread out.

    It's way easier to forgo all simulation and just run the code on the FPGA to see what it does. Setting up simulations are a huge headache and waste of time, in my experience. It's better to move the debugging effort upwards into real-time observation of the real thing.
  • Heater.Heater. Posts: 21,233
    edited 2014-08-07 - 07:47:07
    So it's straight onto the nano then, when I get home this evening. Cool.
  • RamonRamon Posts: 385
    edited 2014-08-07 - 08:33:19
    cgracey wrote: »
    It's free.

    BIG THANKS !!

    You guys are great. I am shocked too ! As you have said many times, the code is (awesome) simple. 10 files, 117 Kb.

    Digital -> (162) Lines
    -> COG (529 Lines)
    -> ALU (154 Lines)
    -> CTR (121 Lines)
    -> RAM (49 Lines)
    -> Video (194 Lines)
    -> HUB (263 lines)
    -> HUB MEM (117 lines)
    -> ROM_HIGH (16K)
    -> ROM_LOW (16K)

    This is just the seed. Like Linux 0.01 (71 Kb compressed) 23 years ago. I wish you the same luck (or better).

    I bet all of you that a radiation hardened version of Propeller will land in Mars in no more than 15 years.

    I take my hat off to you. Where should I send the money for a 28nm shuttle run?
  • DelusDelus Posts: 79
    edited 2014-08-07 - 13:32:12
    WOW This is amazing! I sense a drop in productivity approaching...
  • DelusDelus Posts: 79
    edited 2014-08-07 - 13:38:57
    Just noticed the rad hard comment, if I get a chance I'll run the design through our synthesis tools in the IC process I work with (Unofficially rad-hard). I think I can safely post power estimates and area requirements if anyone is interested without violating our NDA (Though I should probably double check that one).
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