Got an interesting project in the form of an old automatic antenna tuner and its apparently defunct microcontroller, an NEC uPD7507C. This has onboard factory-programmed ROM and apparently no way to read its contents, so a redesign in in order. What the OEM circuit does is to control several discrete components to find the best match for a transmitter into a given load, then stores the settings in some internal RAM which is battery-backed. You can turn the device off and let it sit and the settings are retained. Should a better match ever be found (done automatically or commanded manually) the new settings are stored.
Given the large number of I/O pins on the original chip - most of which drive things like indicators, relays and whatnot - my thought is to redesign the entire CPU board to use a BS2P40. This presents a conundrum, however...as there's apparently no way to back up the device's RAM between power-offs. (I'd thought about tying a 9v battery to the Reg pin through a diode, connecting the 5v In pin to the tuner's regulated 5v source and monitoring it to put the Stamp to sleep in the event of power-down).
On to the EEPROM: The stored settings mentioned earlier take a maximum of 80 bytes (probably less) and are only updated when the tuner's internal logic dictates a re-match operation should be performed -or- if the operator commands a manual adjustment. Assuming a few such operations per day max, is the longevity of the Stamp's EEPROM any cause for concern? Or is there a better way to do this?
I have a clean slate to work with in terms of programming and some hardware design, so comments or guidance are welcomed.