high gain ADC modes

 			%AAAA_BBBB_FFF_PPPVVV_OHHHLLL_TT_MMMMM_0
			%VVV = ADC config
			000: GIO, 1x (~5 volt range, centred on VIO/2)
			001: VIO, 1x       "
			010: RevB: PinB, 1x      RevC: high-Z
			011: PinA, 1x      "
			100: PinA, 3.16x (~1.58 volt range, centred on VIO/2)
			101: PinA, 10x   (~0.5 volt range, centred on VIO/2)
			110: PinA, 31.6x (~0.158 volt range, centred on VIO/2)
			111: PinA, 100x  (~0.05 volt range, centred on VIO/2)
I just noticed that there are ADC modes with a gain higher than 1x what means they have a smaller input range that doesn't include GND and VCC. What are those modes intended to be used for?

I think they can probably used only for AC signals like microphones or other audio signals because the auto-calibration (GIO/VIO switch) doesn't work for them. I fear that the offset could be larger than the input range (at least for the 31.6x and 100x modes) what would make them completely useless for DC signals. Or can we make assumptions on the ratios of the internal resistors so that it's possible to calibrate at least the offset in 1x mode and then switch to higher gain?

I wonder if this could be used to measure low voltage sensor signals like thermocouples directly.
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Comments

  • evanhevanh Posts: 10,099
    edited 2020-03-26 - 19:43:46
    Yeah, you've summed it up, not intended for DC.

    Interestingly though, the revC silicon change allows measuring of the PinA VIO/2 centre point, or zero-bias point as Chip referred to it recently. So that feature may be effective for handling DC when they come available.

  • As the adc's are based on current input, not voltage, a current mirror can easily shift the input signal to the input range of the ADC
  • evanhevanh Posts: 10,099
    edited 2020-03-26 - 20:09:56
    Ah, no, I think there's buffer op-amp in between. The external inputs are voltage. I could be wrong.
  • jmgjmg Posts: 14,541
    evanh wrote: »
    Ah, no, I think there's buffer op-amp in between. The external inputs are voltage. I could be wrong.

    The PINA connects via a choice of resistors to a virtual earth 'MID' biased Opamp.
    evanh wrote: »
    Interestingly though, the revC silicon change allows measuring of the PinA VIO/2 centre point, or zero-bias point as Chip referred to it recently. So that feature may be effective for handling DC when they come available.
    That may help a little.

    ManAtWork wrote: »
    I think they can probably used only for AC signals like microphones or other audio signals because the auto-calibration (GIO/VIO switch) doesn't work for them.
    Yes
    ManAtWork wrote: »
    Or can we make assumptions on the ratios of the internal resistors so that it's possible to calibrate at least the offset in 1x mode and then switch to higher gain?
    That would work, to a point.
    50% of the 1 cal Vcc/Gnd would be close to MID and as evanh says, the rev C NC allows closer MID checks
    ManAtWork wrote: »
    I wonder if this could be used to measure low voltage sensor signals like thermocouples directly.
    Even with an external chopper (get get AC signal), the noise floor of the P2 is likely to be poor. Best to use an external amplifier or higher performance ADC for thermocouples.
  • evanh wrote: »
    revC silicon change allows measuring of the PinA VIO/2 centre point, or zero-bias point

    Yes, but the result is the digital bit pattern of the AD-converted bias point. You still don't know the actual voltage at the bias node. To measure a termocouple you have to connect one wire of the thermocouple to the ADC pin and the other to a constant voltage with the exact voltage level of the internal bias point. You could trim the external bias voltage with a DAC output and an external analogue MUX to match the internal bias point.

    ErNa wrote: »
    As the adc's are based on current input, not voltage, a current mirror can easily shift the input signal to the input range of the ADC

    Yes, if you had a perfect current mirror. Practical (affordable) current mirrors I've seen (BCV-something) have offset voltages in the 5mV range and gain tolerances of +/-20..50%. Temperature drift makes manual trimming hard. I fear they are pretty useless for high precision applications.

    A voltage driven current source built with a chopper stabilized precision OP-amp should work, though. Not much cheaper than an external ADC but simpler.

    An external chopper (analogue MUX) to generate an AC signal might also work. You have to be careful because cheap analogue switches have unbalanced charge injections which is seen as a DC offset. But you could not only chopper the polarity but also the frequency making it possible to calculate and compensate the error.
  • evanhevanh Posts: 10,099
    edited 2020-03-27 - 09:29:39
    ManAtWork wrote: »
    To measure a termocouple you have to connect one wire of the thermocouple to the ADC pin and the other to a constant voltage with the exact voltage level of the internal bias point.
    You only need to know the temperature and voltage at the electrical terminals of the two thermocouple wires. The rest is all relatively simple maths.

    Biggest problem with thermocouple measuring is noise removal, particularly common-mode DC. Electrical isolation is pretty much a necessity.

    The nature of the thermo-electric effect means it affects all wires but normally this effect is cancelled by the fact that the same metal is used along all wires in the circuit. The remaining non-thermocouple wiring is self-cancelling. This is why just knowing the temperature at the terminals works so well.


    As for the maths, it's as simple as knowing that when probe temperature is same as terminal temperature then you always have 0.0 Volt measurement. So probe temperature = measured volts * calibrated scale + terminal temperature.

    Well, it's a little more complicated by the fact that thermocouple behaviour isn't a linear scale. A lookup table is often used for the voltage to calibrated scale translation.

  • Noise is no problem because the signal changes very slowly. You can apply a really low bandwidth low pass filter averaging many, many samples.

    In this thread I focused on the ADC and how to trim offset errors. Other issues with thermocouples like cold junction compensation and linearization have already been discussed in this old P1 thread.
  • evanhevanh Posts: 10,099
    edited 2020-03-27 - 10:08:08
    My point is you don't need any added voltage. What you need is to know the temperature of the terminals.

    And there isn't a low pass filter that can remove the DC drifts you get from common mode interference.

  • evanhevanh Posts: 10,099
    edited 2020-03-27 - 11:35:25
    Oh, the internal bias point, apologies, that certainly didn't sink in what you meant. It won't be a steady target I don't think. You'll be adding more drift trying to match it with an external voltage.

    Use either an external voltage amp to bring the voltage up to x1 gain on the internal ADC, or better still an external ADC with isolation.

  • jmgjmg Posts: 14,541
    edited 2020-03-27 - 23:49:24
    ManAtWork wrote: »
    An external chopper (analogue MUX) to generate an AC signal might also work. You have to be careful because cheap analogue switches have unbalanced charge injections which is seen as a DC offset. But you could not only chopper the polarity but also the frequency making it possible to calculate and compensate the error.

    That's probably the best 'low cost helper' approach.
    You could also use wider MUX to allow a zero and full scale (mV) calibrate from a divider, because P2's ADC-gain is also not precise.
    That would be 2 digital control lines, plus an Analog In, and (maybe) a SetCal output.
    The low charge injection MUXs do move up in price, and something like NAU7802 etc may be good enough (i2c 24b ADC with PGA)
  • Could there be some solution along the lines of using a sample-and-hold to capture the ADC's bias point, and then connecting the thermocouple across the output of the sample-and-hold and the ADC lines? Would it require too many analog switches?
  • jmgjmg Posts: 14,541
    Could there be some solution along the lines of using a sample-and-hold to capture the ADC's bias point, and then connecting the thermocouple across the output of the sample-and-hold and the ADC lines? Would it require too many analog switches?

    A cap on the ADC pin should capture the average bias point, and you could toggle a thermocouple on top of that with an analog switch, or you could equally toggle it on the GND leg of the cap, to allow one side of the thermocouple to be GND. The p-p AC change is the thermocouple mV, but you still need a gain calibrate pass.
  • There was a nice picture of the internal RC network of the ADCs in the P2. But, as often, I can't find it in the forum. I thought it was in the ADC sampling breakthrough thread. Can anybody find it? I think it would also be very helpful if it was included in the official data sheet of the P2.
  • Found it! It's in this thread.
    Prop2_ADC_functional.png
  • Yes, that's the idea, but the feedback is a precision current source, not a resistor, which improved the performance a lot.
  • Tracy AllenTracy Allen Posts: 6,534
    edited 2020-11-19 - 23:45:21
    How well matched are the pins, Chip? It seems to me if you run two pins as ADCs, they should both self-bias at very nearly the same voltage, and they might even track pretty well with temperature drift and supply voltage. Hook your thermocouple or thermopile between them, differential. As one digital response goes up, the other goes down. Granted, 1/f noise will be an ultimate limitation at DC. A differential connection for thermocouples is always best anyway, even with a dedicated ADC, to help with common mode effects.
  • I looked at this previously using OzProp's high Z meter, and posted the results here somewhere. My memory is that the junctions was within a few mv, but adjacent pins weren't necessarily well matched. Thats a pity because if they were well matched we could put a feedback loop such that VIO was adjusted to keep the junctions at 1.650 v

    We're about to get a bunch boards assembled so will be able to get a feel for variations between chips
  • How well matched are the pins, Chip? It seems to me if you run two pins as ADCs, they should both self-bias at very nearly the same voltage, and they might even track pretty well with temperature drift and supply voltage. Hook your thermocouple or thermopile between them, differential. As one digital response goes up, the other goes down. Granted, 1/f noise will be an ultimate limitation at DC. A differential connection for thermocouples is always best anyway, even with a dedicated ADC, to help with common mode effects.

    Their matching would be a function of the resistor matching which is used to set the current midpoint of each ADC. It makes sense that they are a few mV apart, only. The inverter in the middle of each ADC feedback loop varies quite a lot, I'm sure, but since current feedback is used to balance the ADC, this voltage disparity must not be much of a factor.
  • Would be neat to measure thermocouple voltage directly...
  • Thermocouples were my first idea. They cost a few $ anyway so it wouldn't hurt to add an external analogue multiplexer for calibration.

    My current application is measuring current with a shunt resistor (see stepper motor thread). For a stepper motor it is necessary to measure current of 4 half bridges. So it is essential to keep the circuits as simple as possible. The x31.6 mode would provide an input range of +/-80mV which would be ideal for low resistor values, for example 10mOhm for +/-8A.
    Yes, that's the idea, but the feedback is a precision current source, not a resistor, which improved the performance a lot.
    Yes, I know. But the implementation details don't matter much. It's an "equivalent circuit" diagram and helps to estimate what input current or impedance to expect. I'd definitely include it in the data sheet.
  • cgracey wrote: »
    Their matching would be a function of the resistor matching which is used to set the current midpoint of each ADC. It makes sense that they are a few mV apart, only. The inverter in the middle of each ADC feedback loop varies quite a lot, I'm sure, but since current feedback is used to balance the ADC, this voltage disparity must not be much of a factor.

    Does anyone have a quick link to a deeper dig into the feedback circuit? I had bookmarked this likely thread, but it's 52 pages!
    http://forums.parallax.com/discussion/169298/adc-sampling-breakthrough/p1
    I'm trying to get my head around, "The inverter in the middle of each ADC feedback loop varies quite a lot, I'm sure, but since current feedback is used to balance the ADC, this voltage disparity must not be much of a factor.". It seems to me that the response is in the main going to hover around the threshold of that first inverter, regardless of the details or symmetry of the feedback or input signal.




  • evanhevanh Posts: 10,099
    edited 2020-11-20 - 18:14:51
    Does anyone have a quick link to a deeper dig into the feedback circuit? I had bookmarked this likely thread, but it's 52 pages!
    http://forums.parallax.com/discussion/169298/adc-sampling-breakthrough/p1
    There hasn't been any deeper details posted for the ADC circuit. That link was all about using the bitstream from the ADCs.

    The only new info is for the I/O block diagram discussion. Chip posted a schematic showing the whereabouts and controls but not the guts of the ADC - https://forums.parallax.com/discussion/comment/1494131/#Comment_1494131

  • Here is the ADC schematic.

    The inverter chain that makes the 0/1 decision has a net threshold voltage that certainly varies from ADC to ADC, but they wind up switching current back to the balance caps, overcoming whatever the specific threshold voltage is. Those current sources are high-impedance and not subject the kind of current change that an inverter driving a resistor to the balance caps would have, as the cap voltages reflect the net threshold of the inverter chain.

    Wait, that file type is not allowed. I'll have to make a link....
  • evanhevanh Posts: 10,099
    edited 2020-11-20 - 23:56:56
    Thanks heaps Chip. Zipping it would have worked for storing on the forum, btw.

    Here's a 200 DPI png conversion using mutool ... err, file too big ... it was 24 bpp! Here we go:
    8800 x 6800 - 201K
  • I'm terrible at understanding amplifiers but have slowly understood some aspects over the years. So I wouldn't be able to transcribe the current balancing there into a simplified functional drawing.

    In fact I don't even understand the implications of those "B" op-amps.

  • I attached a PDF version
  • evanhevanh Posts: 10,099
    edited 2020-11-21 - 01:06:24
    Bob,
    What did you use for the conversion? Mutool mangled the font when I tried to make it a pdf.

    EDIT: Never mind, I see you printed it from Windoze XPS Viewer.

  • Tracy AllenTracy Allen Posts: 6,534
    edited 2020-11-21 - 05:17:15
    Chip, Thanks for posting that. Wow, that's a big leap from the minimalist Prop 1 ctrx! So many transistors, and a whole lexicon of signal names and device characteristics.
    cgracey wrote: »
    Yes, that's the idea, but the feedback is a precision current source, not a resistor, which improved the performance a lot.

    I see... hardly! yet??
    I do see the core functions at the right side of the diagram.

    -- There is the string of inverters feeding the D flip flop.
    -- I believe the block labelled PASS is simply a transmission gate that lets the signal through only when the ADC is enabled, controlled by En and Ep. There are lots of PASS blocks, where the input source and resistance are selected.
    -- The Sn and Sp outputs of the D flip flop feed back to the input of that same block, but instead of a simple resistor, they steer either a positive current iUP or a negative current iDN into the summing junction.
    -- I'm surmising that the two mosfets M51 and M52 are used as integration capacitors via their gate-substrate capacitance.

    But, there is so much else going on.
    I'm confused too, Evan, by the triangle block "B". It might well be a Buffer, or some other linear op-amp circuit, need to account for that 20µA source associated with "B", maybe as a gain control. "B" appears three times at critical points in connection with the signals INFB, RFB, BAL, MID and LOD. Those names need verbose translation! I believe MID and LOD are reference voltages, and INFB and BAL are the input signal before and after some kind of balancing, and RFB, no idea. Chip?

  • cgraceycgracey Posts: 13,128
    edited 2020-11-21 - 06:06:09
    Yes, M51 and M52 are the integrator caps.

    LOD is an active load that tracks the integrator voltage within 5mv so that when the 180nm (actually 1.8V) NMOS transistors switch away from the integrator caps, they switch to LOD, so that there's no net voltage or current change in the iUP/iDN sources, which are very delicate and high-impedance. This makes it work really nicely and it doesn't matter what the actual net threshold voltage of those six series inverters are. All the action is in current mode with near-zero net charge transfer in the 180nm switches. Everything is quiet and very subtle.
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