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  • Maybe writing to flash fails after the first page or something like that. As I said earlier I'd feel a lot more confident if the flash programmer would do a verify.
  • Hmm, the program seems to be a lot shorter than one page.
    TAQOZ# $10000 $180 sf dump ---
    0001_0000: 60 00 00 00  00 24 60 FD  E8 01 80 FF  1F 20 65 FD     '`....$`......
     e.'
    0001_0010: 03 24 44 F5  00 24 60 FD  3E F8 0C FC  80 08 80 FF     '.$D..$`.>....
    ...'
    0001_0020: 3E 0E 1C FC  41 7C 64 FD  09 90 5C FB  08 82 5C FB     '>...A|d...\..
    .\.'
    0001_0030: 07 A0 5C FB  06 A0 5C FB  05 B2 5C FB  04 40 5C FB     '..\...\...\..
    @\.'
    0001_0040: A1 07 80 FF  1F 80 64 FD  DC FF 9F FD  48 03 04 01     '......d.....H
    ...'
    0001_0050: 3E FE 97 FA  40 7C 6C FD  3E EE 27 BC  2D 00 7C BD     '>...@|l.>.'.-
    .|.'
    0001_0060: EC FF 9F FD  00 00 00 00  00 00 00 00  00 00 00 00     '.............
    ...'
    0001_0070: 00 00 00 00  00 00 00 00  00 00 00 00  00 00 00 00     '.............
    ...'
    (00 repeating until end)
    
  • evanhevanh Posts: 9,962
    edited 2020-01-20 - 14:07:05
    That's the second stage blinky program at that address. Currently unused.

    The testing program is in the first stage located at the start of the flash, from address 0. Here's the start of it as placed in the binary:
    00400 000             | stage1	
    00400 000 59 7A 64 FD | 		drvh	#spi_cs			'SPI chip select - start not selected!
    00404 001 50 74 64 FD | 		fltl	#spi_do
    00408 002 50 76 64 FD | 		fltl	#spi_di
    0040c 003             | 
    0040c 003             | 'config one smartpin for SPI clock
    0040c 003 50 78 64 FD | 		fltl	#spi_clk
    00410 004 3C D0 04 FC | 		wrpin	.mode_clk, #spi_clk			'unregistered SPI clock pin, helps with read timing
    00414 005 3C CC 14 FC | 		wxpin	.spi_clk_ca, #spi_clk			'sysclock/8 bitrate (min of /8 for tx smartpin!)
    00418 006 41 78 64 FD | 		dirh	#spi_clk
    0041c 007             | 
    0041c 007 21 F8 64 FD | 		setse2	#E_PIN_RISE | spi_clk	'setup event on completed SPI clock pulses from smartpin
    00420 008             | 
    00420 008             | 'faster sys-clock for faster loading
    00420 008 00 BE 60 FD | 		hubset	 .clk_mode		'config crystal and PLL - still running RCFAST
    00424 009 1F C0 60 FD | 		waitx	 .pause			'wait for crystal/PLL to ramp up
    00428 00a 03 BE 44 F5 | 		or	 .clk_mode, #XSEL	'select clock mode
    0042c 00b 00 BE 60 FD | 		hubset	 .clk_mode		'engage
    00430 00c             | 
    00430 00c             | 'set up serial output for progress messages
    00430 00c 40 7C 64 FD | 		dirl	#ser_tx_pin
    00434 00d 3E F8 0C FC | 		wrpin	#SPM_ASER_TX, #ser_tx_pin
    00438 00e 00 F3 81 FF 
    0043c 00f 3E 0E 1C FC | 		wxpin	##(CLOCKFREQ / SERIAL_BAUD)<<16 | 7, #ser_tx_pin
    00440 010 41 7C 64 FD | 		dirh	#ser_tx_pin
    00444 011             | 
    00444 011             | '------------------------------------
    00444 011 38 DA 4C FB | 		callpa	#.title_msg, #.puts
    00448 012 64 00 B0 FD | 		call	#.test_modes		'clk=REGD, data=UNREGD
    ...
    
  • The code for programming the flash is virtually untouched from Brian's original. I had tweaked the clock ratio a small amount to make it 50:50 is all. The fact that there is valid code at the right location seems it's working fine.

    I might have a look at the ROM loader, it'll be different again ...

  • Ok, the code at $000 is there and matches. So it must be the ROM bootloader. If that's true I have to get another flash chip, I fear. As long as I don't know the cause of the incompatibility I can only try...

    Issi IS25LP080
    Microchip SST25VF080
    Amic A25L080
    Adesto AT25SF041
    ON Semi LE25U40
    Winbond W25Q80

    BTW, the latter is also quite cheap ($0,28)

  • I've repeated your test with the Winbond W25Q80 and the Adesto AT25SF041 flash chips. Both give the same results
    Loading G:/Projekte/Speedcube3/Source/Propeller/P2ES_flashloader-2MHz.binary - 4
    224 bytes
    chksum: 97 OK
    ( Entering terminal mode.  Press Ctrl-] to exit. )
    P2-ES Flash Programmer
    Erasing flash...
    Programming...
    Done
      DPI   Dual   Fast   SPI
    --------------------------
     Pass   Pass   Pass   Pass
     Pass   Pass   Pass   Pass
     Fail   Fail   Fail   Fail
     Pass   Pass   Pass   Pass
     Pass   Pass   Pass   Pass
     Pass   Pass   Pass   Pass
     Pass   Pass   Pass   Pass
     Fail   Fail   Fail   Fail
    
    So they should be compatible with the Dual SPI modes you use. I looked up in the data sheet that the Adesto chip supports single pin read up to 50MHz and dual read mode up to 104MHz.
  • Yep, so far, every part tested seems to support all modes. Only very old flash chips don't.

    Aside, I was pondering just adopting Chip's much simpler code since it goes plenty fast enough. But then I realised that I'd still like to be able to run tests on the revA boards with the revA IC's.

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