Welcome to the Parallax Discussion Forums, sign-up to participate.
evanh wrote: »
Huh, you're right, it looks like Chip has one too many bits. The group of 8 zeros should be 7.
Have a read of my links if you haven't anyway, you should find them helpful - https://forums.parallax.com/discussion/comment/1483529/#Comment_1483529
You'll see I've divided the %P's up a little more than Chip does.
That %FFF filter is not for ADC. That's just a really basic three sample unanimous voting deglitcher for digital inputs.
ManAtWork wrote: »
Ok, thanks. Then I think it's genrally a good idea to connect analogue inputs to a pin pair (not only for the capacitive coupling problem of rev B silicon). This way I could calibrate one of them in the background while doing real conversions with the other. Although Chip somewhere mentioned that the pins have thermal settling times in the µs range I think that two adjacent pins should have aproxximately the same temperature if nothing in the neighbourhood drives high currents. So alternating calibration and real measurements every 100 samples or so should be OK.