Memory Breakout Poll

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Comments

  • Cluso99Cluso99 Posts: 15,530
    edited 2019-06-27 - 09:45:27
    Ok, I see the 10K.
    My assumption was that the IO+15 was connected only to the prop connector, and therefore the external-reset was from the flash/ram. IMHO the schematic is therefore a bit confusing. Often you cannot visualise the whole schematic.
    Since there is plenty of space on P1 of the schematic it might be more prudent to place the links on the parts involved. In fact, all on the one page would be even - it’s a only a tiny circuit.
    My Prop boards: P8XBlade2 , RamBlade , CpuBlade , TriBlade
    P1 Prop OS (also see Sphinx, PropDos, PropCmd, Spinix)
    Website: www.clusos.com
    P1: Tools (Index) , Emulators (Index) , ZiCog (Z80)
    P2: Tools & Code , Tricks & Traps
  • I just noticed this octal-SPI chip on Digikey: GD25LX256E

    I appears that they copied the pinout of HyperFlash…
    At least, at first glance it appears to be pin compatible...
    Prop Info and Apps: http://www.rayslogic.com/
  • Yeah, I think they have compatibility modes to go with the matching pinouts. Sadly none are RAMs. Although, those particular Flash memories do have long wear factor I think. They could do quite well as, say, scope capture buffers.
    We have the vastness of the internet and yet billions of people decided to spend most of their time within a horribly designed, fake-news emporium of a website that sucks every possible piece of personal information out of you so it can sell it to others. And they see nothing wrong with that.
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