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P2 can do SDR !! — Parallax Forums

P2 can do SDR !!

Just found this!
We are all excited to get our hands on the P2 and start doing cool stuff but now I'm really drooling!

A guy found a way to use an FT232RL UART to do SDR and control a 27MHz remote control car.
Check it out here:
https://hackaday.com/2018/12/06/your-usb-serial-adapter-just-became-a-sdr/

He's using a 2Mbaud data rate to do it.
What baud rates can the P2 output?
I've heard 4Mbaud mentioned for serial and higher for the USB. What's the top end?

j

Comments

  • pedwardpedward Posts: 1,642
    edited 2018-12-06 21:11
    I made the P1 broadcast audio on the 2M FM band.



    That said, this is not the right way to do it. The square wave output has a ton of harmonics that pepper the spectrum with noise. You will note in the article that there are very significant off-frequency peaks in their spectrum sample.

    It could be possible to use the DACs to generate a 27Mhz sine wave, given that they can do 1080p component video, which is 60Mhz+
  • cgraceycgracey Posts: 14,133
    The Goertzel mode can play a 512-entry table out to the DACs with 32-bit frequency control.
  • cgracey wrote: »
    The Goertzel mode can play a 512-entry table out to the DACs with 32-bit frequency control.

    How fast can it update the DAC? What's the max bandwidth of the DACs?
  • cgraceycgracey Posts: 14,133
    pedward wrote: »
    cgracey wrote: »
    The Goertzel mode can play a 512-entry table out to the DACs with 32-bit frequency control.

    How fast can it update the DAC? What's the max bandwidth of the DACs?

    DACs update in 2ns. They can update at the clock rate.
  • Is the P2 going to be any better at generating a carrier wave without chirps and birdies than the P1, as Phil Pilgrim demonstrated back in the day?
  • Ok, so the limit is 500Mhz for the DACs. If you need 27Mhz carrier and the limit is the clock frequency, and you overclocked to 270Mhz, that would be 10 DAC samples. That's a kinda rough for doing direct digital synthesis. 360/10 is 36 degrees, so you'd get 1 DAC sample every 36 degrees. Something tells me the spectrum plot would be a little rough looking.
  • Yeah - people have been making WSPR beacons from pwn on pi.

    You basically square-wave and then use a LPF to clean it up.

    The P2 is going to make a glorious Global Balloon payload once it reaches general availability.
  • localroger wrote: »
    Is the P2 going to be any better at generating a carrier wave without chirps and birdies than the P1, as Phil Pilgrim demonstrated back in the day?
    P2 will destroy the P1 for RF applications. It has the Goertzel hardware, which can output a carrier DDS style. And it also has the ability to be an IQ demodulator. The color space converter is said to also be usable as an IQ modulator. So the P2 is basically a single chip SDR transceiver.

    pedward wrote: »
    Ok, so the limit is 500Mhz for the DACs. If you need 27Mhz carrier and the limit is the clock frequency, and you overclocked to 270Mhz, that would be 10 DAC samples. That's a kinda rough for doing direct digital synthesis. 360/10 is 36 degrees, so you'd get 1 DAC sample every 36 degrees. Something tells me the spectrum plot would be a little rough looking.
    A 270MHz DAC can generate signals up to 135MHz. In practice you'd want to stay below 120MHz or so to keep the low pass filter rolloff requirement reasonable. In Nyquist We Trust
  • One thing an LPF can't filter is phase jitter. Perhaps someone can explain how the P2 might overcome the P1's limitations in this regard, except at some "golden" frequencies?

    Thanks,
    -Phil
  • cgraceycgracey Posts: 14,133
    edited 2018-12-07 03:34
    One thing an LPF can't filter is phase jitter. Perhaps someone can explain how the P2 might overcome the P1's limitations in this regard, except at some "golden" frequencies?

    Thanks,
    -Phil

    No problem, Phil. Because we output actual sine waves, we don't have those nasty edges appearing in the wrong places. At any phase, the DAC level will be appropriate.
  • cgraceycgracey Posts: 14,133
    pedward wrote: »
    Ok, so the limit is 500Mhz for the DACs. If you need 27Mhz carrier and the limit is the clock frequency, and you overclocked to 270Mhz, that would be 10 DAC samples. That's a kinda rough for doing direct digital synthesis. 360/10 is 36 degrees, so you'd get 1 DAC sample every 36 degrees. Something tells me the spectrum plot would be a little rough looking.

    It will actually be pretty good, because you won't hit the same phase samples every time through the loop. So, on average, you will be very accurate with a high Q.
  • One thing an LPF can't filter is phase jitter. Perhaps someone can explain how the P2 might overcome the P1's limitations in this regard, except at some "golden" frequencies?

    Thanks,
    -Phil
    Direct digital synthesis is able to generate arbitrary frequencies without jitter. I'm not quite sure of the best way to explain it. Consider the P1 NCO output. It's quantized in both time and amplitude. Quantization in time causes images in frequency. See the Nyquist theorem. Quantization in amplitude causes harmonics. It's likely that these effects interact in unpleasant ways on the P1. We have an 8 bit DAC on the P2. It will have image frequencies, but not harmonics (at least not of significant amplitude.)

    Feeding the P1 NCO into the PLL doesn't do much to clean up the output. The PLL has a wide bandwidth that can pass a lot of jitter. And the VCO has a fair amount of phase noise itself.

    There will still be some jitter from the sysclock PLL itself. Hopefully on the P2 is it improved from the P1. Measurements here:
    https://forums.parallax.com/discussion/comment/1429445/#Comment_1429445

  • Yup, I get it. Even with gross quantization at high frequencies, jitter would be at a minimum, and something like an LC filter should take care of the harmonics.

    -Phil
  • jmgjmg Posts: 15,144
    There will still be some jitter from the sysclock PLL itself. Hopefully on the P2 is it improved from the P1. Measurements here:
    https://forums.parallax.com/discussion/comment/1429445/#Comment_1429445
    There are already reports of the P2 PLL not being quite good enough for VGA generate, and needing a high PFD to lower the jitter.
    It will be very interesting to see similar curves, done for P2.

    P2 will destroy the P1 for RF applications. It has the Goertzel hardware, which can output a carrier DDS style.
    True, but the Goertzel is slower than the DACs, and can it feed the streamer/DACs directly, or does it need a software loop ?

    Dedicated DDS chips, run a wide adder at SysCLK speeds and feed the upper bits into a Sine LUT then to a DAC.

    It's not clear yet where P2 will be able to get to, with DDS widths and LUT sizes / feed rates ?
  • cgraceycgracey Posts: 14,133
    edited 2018-12-17 01:54
    jmg wrote: »
    Dedicated DDS chips, run a wide adder at SysCLK speeds and feed the upper bits into a Sine LUT then to a DAC.

    That is exactly what the Goertzel circuit does. Plus, it does the Goertzel MAC's using the ADC bitstream.
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