Note: for oscillator selection P2 clocking at 250MHz (for HDMI) cannot be achieved with 12.288MHz, though it can be at 19.2MHz and 26MHz using the following divisor/multiplier ratios if these suit the P2 PLL range...

250 = 19.2/48 * 625
250 = 26/13 * 125, or 26/26 * 250, or 26/52 * 500

Also for HDTV stuff 148.5 MHz happens to be 19.2/64 * 495 and 26 / 52 * 297

Note: for oscillator selection P2 clocking at 250MHz (for HDMI) cannot be achieved with 12.288MHz, though it can be at 19.2MHz and 26MHz using the following divisor/multiplier ratios if these suit the P2 PLL range...

250 = 19.2/48 * 625
250 = 26/13 * 125, or 26/26 * 250, or 26/52 * 500

Also for HDTV stuff 148.5 MHz happens to be 19.2/64 * 495 and 26 / 52 * 297

Maybe using a 12.288 MHz, clipped sine, VCTCXO could even enable calibration under sofware control, both numerically and also thru a filtered pin DAC.

12.288MHz is a rare value, more common are GPS related valued, like 19.2MHz and 26MHz
The PLL means either of those can be used, ans still have whole-number relations with 50Hz/60Hz
19.2M/60 = 320000
19.2M/50 = 384000
26M/50 = 520000
26M/60 = 433333.3333' - so you need a x3 in the PLL, if you want whole-numbers.

I think 19.2MHz or 9.6MHz would be the ideal XO frequency.

The thing about non-even MHz frequencies from TCXO's is that they will require big initial XI (clock input) dividers to get down to something that can be multiplied back up to get to other needed frequencies. When using a big initial XI divider from something around 10-20MHz, very weak VCO pump currents must be used to adjust the VCO, since the divided XI frequency is so low and the correction pulses are infrequency. As that frequency gets multiplied up in the VCO with such gentle feedback current and seldom corrections, the VCO jitter becomes worse at really high final output frequencies. A 10MHz or 20MHz TCXO would ideal, I think.

The thing about non-even MHz frequencies from TCXO's is that they will require big initial XI (clock input) dividers to get down to something that can be multiplied back up to get to other needed frequencies. When using a big initial XI divider from something around 10-20MHz, very weak VCO pump currents must be used to adjust the VCO, since the divided XI frequency is so low and the correction pulses are infrequency. As that frequency gets multiplied up in the VCO with such gentle feedback current and seldom corrections, the VCO jitter becomes worse at really high final output frequencies. A 10MHz or 20MHz TCXO would ideal, I think.

The common / cheap ones are GPS sector and those tend to favour 19.2MHz or26MHz.
26MHz meets your even-MHz request ?
48MHz would be interesting to try.

The thing about non-even MHz frequencies from TCXO's is that they will require big initial XI (clock input) dividers to get down to something that can be multiplied back up to get to other needed frequencies. When using a big initial XI divider from something around 10-20MHz, very weak VCO pump currents must be used to adjust the VCO, since the divided XI frequency is so low and the correction pulses are infrequency. As that frequency gets multiplied up in the VCO with such gentle feedback current and seldom corrections, the VCO jitter becomes worse at really high final output frequencies. A 10MHz or 20MHz TCXO would ideal, I think.

The common / cheap ones are GPS sector and those tend to favour 19.2MHz or26MHz.
26MHz meets your even-MHz request ?
48MHz would be interesting to try.

26MHz would be great!

We've got a 20MHz +-10ppm crystal going on the eval board now.

We've got a 20MHz +-10ppm crystal going on the eval board now.

What's the error of these GPS oscillators, again?

It varies - usually never worse than ±2ppm, and some are ±0.5ppm
The VCTCXOs have a voltage control pin, and are designed to optionally lock to an even better standard, like a GPS derived 1pps, or be calibrated post-reflow.

Shows ±2ppm max for 2 reflows, and ±0.5ppm over -30 to +85°C, with ±.05ppm/°C, 1ppm/ year aging

With the free-DAC's the P2 is well suited to using a VCTCXO

Addit: and some P2 customers will likely use these, in 2019 OCXOs
SiT5711 1 to 60 MHz ±0.005ppm (±5 ppb) or ±0.008ppm (±8 ppb) LVCMOS or Clipped sinewave 3.3V -20 to +70 or -40 to +80 9.0 x 7.0mm
No price or mA on those, but the trend is impressive.
Current listings for OCXO show ±50ppb -40°C ~ 85°C 122mA Surface Mount (9.70 x 7.50 x 4.30mm) for sub $30/100

The thing about non-even MHz frequencies from TCXO's is that they will require big initial XI (clock input) dividers to get down to something that can be multiplied back up to get to other needed frequencies. When using a big initial XI divider from something around 10-20MHz, very weak VCO pump currents must be used to adjust the VCO, since the divided XI frequency is so low and the correction pulses are infrequency. As that frequency gets multiplied up in the VCO with such gentle feedback current and seldom corrections, the VCO jitter becomes worse at really high final output frequencies. A 10MHz or 20MHz TCXO would ideal, I think.

The common / cheap ones are GPS sector and those tend to favour 19.2MHz or26MHz.
26MHz meets your even-MHz request ?
48MHz would be interesting to try.

26MHz would be great!

The last sentence seems not to accord entirely with the first paragraph. 26MHz needs lots of /13 or /26 for integer frequencies, whereas 10MHz needs /5 or /10 or sometimes /1. 9.6MHz has lower divisors than 26MHz for most frequencies and 10MHz for some, e.g. 252MHz is closer to the DVI/HDMI spec than 250MHz and 9.6 * 105/4 = 252.0. I could post more comparisons tomorrow.

Question:
If VCO = n * XI, is a PLL M/D setting of 2n/2 better than n/1?

The thing about non-even MHz frequencies from TCXO's is that they will require big initial XI (clock input) dividers to get down to something that can be multiplied back up to get to other needed frequencies. When using a big initial XI divider from something around 10-20MHz, very weak VCO pump currents must be used to adjust the VCO, since the divided XI frequency is so low and the correction pulses are infrequency. As that frequency gets multiplied up in the VCO with such gentle feedback current and seldom corrections, the VCO jitter becomes worse at really high final output frequencies. A 10MHz or 20MHz TCXO would ideal, I think.

The common / cheap ones are GPS sector and those tend to favour 19.2MHz or26MHz.
26MHz meets your even-MHz request ?
48MHz would be interesting to try.

26MHz would be great!

The last sentence seems not to accord entirely with the first paragraph. 26MHz needs lots of /13 or /26 for integer frequencies, whereas 10MHz needs /5 or /10 or sometimes /1. 9.6MHz has lower divisors than 26MHz for most frequencies and 10MHz for some, e.g. 252MHz is closer to the DVI/HDMI spec than 250MHz and 9.6 * 105/4 = 252.0. I could post more comparisons tomorrow.

Question:
If VCO = n * XI, is a PLL M/D setting of 2n/2 better than n/1?

The lower the XI input divider, the stronger the PLL feedback.

## Comments

8530Vote UpVote Down250 = 19.2/48 * 625

250 = 26/13 * 125, or 26/26 * 250, or 26/52 * 500

Also for HDTV stuff 148.5 MHz happens to be 19.2/64 * 495 and 26 / 52 * 297

5,6410Vote UpVote DownYou can be out by a few percent, even on audio, and no one notices ... until it wobbles.

"Yes," said the Oracle.

"So there's no other life out there?"

"There is. They're alone too."

8740Vote UpVote DownReply moved to

http://forums.parallax.com/discussion/comment/1452138/#Comment_1452138

8740Vote UpVote DownI think 19.2MHz or 9.6MHz would be the ideal XO frequency.

10,1280Vote UpVote Down12,4240Vote UpVote DownThe common / cheap ones are GPS sector and those tend to favour 19.2MHz or26MHz.

26MHz meets your even-MHz request ?

48MHz would be interesting to try.

10,1280Vote UpVote Down26MHz would be great!

We've got a 20MHz +-10ppm crystal going on the eval board now.

What's the error of these GPS oscillators, again?

12,4240Vote UpVote DownThe VCTCXOs have a voltage control pin, and are designed to optionally lock to an even better standard, like a GPS derived 1pps, or be calibrated post-reflow.

This page has a good example of typical specs

Shows ±2ppm max for 2 reflows, and ±0.5ppm over -30 to +85°C, with ±.05ppm/°C, 1ppm/ year aging

With the free-DAC's the P2 is well suited to using a VCTCXO

Addit: and some P2 customers will likely use these, in 2019 OCXOs

SiT5711 1 to 60 MHz ±0.005ppm (±5 ppb) or ±0.008ppm (±8 ppb) LVCMOS or Clipped sinewave 3.3V -20 to +70 or -40 to +80 9.0 x 7.0mm

No price or mA on those, but the trend is impressive.

Current listings for OCXO show ±50ppb -40°C ~ 85°C 122mA Surface Mount (9.70 x 7.50 x 4.30mm) for sub $30/100

8740Vote UpVote DownThe last sentence seems not to accord entirely with the first paragraph. 26MHz needs lots of /13 or /26 for integer frequencies, whereas 10MHz needs /5 or /10 or sometimes /1. 9.6MHz has lower divisors than 26MHz for most frequencies and 10MHz for some, e.g. 252MHz is closer to the DVI/HDMI spec than 250MHz and 9.6 * 105/4 = 252.0. I could post more comparisons tomorrow.

Question:

If VCO = n * XI, is a PLL M/D setting of 2n/2 better than n/1?

10,1280Vote UpVote DownThe lower the XI input divider, the stronger the PLL feedback.