- Announcement about May 10th, 2018 update and your password.
PCB Design criteria for new chip.
I’m wanting to start collecting the known basics for the design. There is some info it Peter’s threads but there’s a lot in there. Some of which is not completely settled?
1. Power supply but up sequence? 1.8v core first then 3.3 analog second? If so what delay. What options to sequence the power? Cheap micro. Or the 1.8 powers up then enables the 3.3? What happens if 3.3 goes first by some accident.
2. 1.8v reg current rating and preferred type. LDO or switching.
3. 3.3v reg current rating and type LDO or Switching
Since a lot of boards need 5 already for various uses, I use a hefty 2a 5V switching so that a large input voltage range can be used and there is power for a lot of of peripheral boards to connect. This means a short drop to 3.3 and to 1.8. But if 1.8 should in theory go on first there needs to be some enable for the 3.3v.
Here is what I use for a main 5V supply for a system that needs 5V at many places:
Obviously this is overkill for most boards but the idea is the same. Large input range, switching so no heat getting down to 5. Then low heat to get to lesser voltages.
Heat sink. Chip says 4 SQ in copper. Or less if the chip isn’t being ran maxed out. Possible the bottom layer or add on heat sink or pcb designed for heat.
5V tolerant inputs like P1? I have abused many hundreds of P1’s with low value input resisters even 1k and never had a problem. Is the new device going to take Similar abuse.
Boot up. So the eeprom is out on this device. SPI flash is the simplest boot device, behaving just like the eeprom did ie some fixed area for bootuo then you can use the higher unused space. Or use the SD card if you prefer that functionality.
This is the first batch I have in mind.