P2D2 - An open hardware reference design for the P2 CPU

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  • PublisonPublison Posts: 10,377
    edited August 28 Vote Up0Vote Down
    I sent a batch of 6 boards to Europe as "Samples". These can be used for distribution in the EU if the recipient can find the time to ship.They seem to have gotten there just fine. Not there yet. One to Canada as "Sample". That posted fine.

    I would be happy to do another round, but I have no more requests at this time. If people line up, ship them out!
    Infernal Machine
  • Peter,

    I would be interested in an updated board (just to get the "latest" changes.)

    I did get a P2D2 from Publison.

    Thanks!
  • I still have quite a few boards left over but I may also get another version done if I do another run, maybe just dressed up a bit more, we'll see.

    If anyone in the US or anywhere else wants some, let me know on this thread.


    .......

    I am in Canada and would like a board (or two if possible). Is there a Canadian re-distributor? If not I would be happy to take that task on.
    In science there is no authority. There is only experiment.
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  • jmgjmg Posts: 12,310
    I still have quite a few boards left over but I may also get another version done if I do another run, maybe just dressed up a bit more, we'll see.
    Maybe that can be done between the package drops - if the first epoxy parts are proven to work ?

    The next 'dress up' step I can think of, is to add a USB-UART, to make the board more like other break-outs ?

    See the Python loader thread for my test results on CP2102N, which seems able to manage half-duplex faster than full duplex, and the download is half duplex.

    ie looks like 6~8MBd settings can sustain ~ 5.5Mbd for full P2 image downloads of ~1.3s

    CP2102N can come as small as 3mmx3mm 0.5mm, and also in 4mmx4mm and 5mmx5mm.
    3mm would be the usual first choice, but that package has corner pads without wettable flanks, so looks less manual assembly friendly.
  • @Peter Jakacki ,
    Hey if you still have some left over I think a while back in this thread or another I had mentioned I was interested in one or two of these original green P2D2 boards. Not sure if you had sent any out to locals or not but in any case I never received anything. You should still have my personal details from when you sent my your IOT5500 boards, but if not, PM me. I can always deposit a couple of tokens into your account for any postage cost as needed.
    Cheers,
    Roger.
  • rogloh wrote: »
    @Peter Jakacki ,
    Hey if you still have some left over I think a while back in this thread or another I had mentioned I was interested in one or two of these original green P2D2 boards. Not sure if you had sent any out to locals or not but in any case I never received anything. You should still have my personal details from when you sent my your IOT5500 boards, but if not, PM me. I can always deposit a couple of tokens into your account for any postage cost as needed.
    Cheers,
    Roger.

    No worries Roger, I will send some off this week.

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  • I'd gladly accept one board :). And some chips to go with it would be great :), but those we get for Chipmas, don't we ?.
  • I would like one please. I am in the US.
  • Peter JakackiPeter Jakacki Posts: 7,806
    edited September 28 Vote Up0Vote Down
    I am updating my artwork with a 1mm center hole if that is enough, adding a pullup for RESN, and allowing for a jumper between 3V3 and 3V3C where the latter powers P48..P63 plus the Flash and SD. This is the H revision artwork that I allow for a tiny MSOP8 PIC chip to do fancy resetting but otherwise a simple 0603 resistor connects the Prop Plug reset to the P2 via the new pullup and the series resnet which provides a little bit of protection. I will post up the artwork later and if there are any other changes that are easy enough to accommodate then please let me know. I will lengthen the track between the two 25mil vias that is designed to be cut to measure the 1.8V current.

    I'm thinking of using a red soldermask for effect.

    I will send this off tomorrow and order at least 100 pcbs plus the stencil that I will ship direct to Parallax if they are happy with that arrangement and I can get the stencil cut to fit your stencil press if you let me know the details. You guys at Parallax are busy enough, so let me do this and hopefully you will have them next Thursday/Friday.

    BTW, I am working off files in my P2 Dropbox folder so feel free to check them anytime plus Altium will work directly with Protel99SE project files.


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  • I will send this off tomorrow and order at least 100 pcbs plus the stencil that I will ship direct to Parallax if they are happy with that arrangement and I can get the stencil cut to fit your stencil press if you let me know the details. You guys at Parallax are busy enough, so let me do this and hopefully you will have them next Thursday/Friday.

    Might it not be an idea to pause the next PCB 'go', until Parallax have done a populated P&P P2D2 to catch any other issues that might need fixing ?

    I am updating my artwork ..., adding a pullup for RESN...
    I thought the P2 has an internal pullup on RESN, (as do pretty much all MCUs) but I could not find a SCH to confirm that.
    I am updating my artwork with a 1mm center hole if that is enough..
    1mm is likely enough to inspect for reflow, but probably not enough to hand solder the centre tab ?

  • Peter JakackiPeter Jakacki Posts: 7,806
    edited September 28 Vote Up0Vote Down
    Ok, 1.5mm hole (maybe up to 2mm) as that is quite large really but of course it could be drilled out as needed although you lose the plating. The pullup on RESN won't hurt plus it is already done but having artwork ready to send off and even sent means that I only need to confirm the order through payment for the process to commence.

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  • jmg,
    They P&P'd 3x P2D2's today, and I believe chip took one with him home.
    The only issue talked about was the reset circuit that was holding reset low, but I believe they will know any others soon enough.
  • Peter JakackiPeter Jakacki Posts: 7,806
    edited September 28 Vote Up0Vote Down
    These are the P59 and RESN nets highlighted on the top layer for the revision which is almost the same as the current F version.

    BTW, I tested an actual P2D2 board with it connected to my CVA9 FPGA and it boots as it was designed to, without resistors.

    RESN.pngP59.png
    542 x 820 - 37K
    804 x 811 - 59K

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  • Roy Eltham wrote: »
    jmg,
    They P&P'd 3x P2D2's today, and I believe chip took one with him home.

    Yes, that's why I suggested waiting until those were tested, as that seems very close.
    Roy Eltham wrote: »
    The only issue talked about was the reset circuit that was holding reset low, but I believe they will know any others soon enough.
    I got lost around there, as the reset circuit cannot hold low, but maybe that was a missing pull-up miss diagnosed.
    I do recall seeing normal reset pulses, which had a clear pullup, but it was hard to follow what was being tested when.
    ( ie Maybe the visible pullup, was physically on the external prop plug board, not in the P2 )

    I think the boot tree has a pull-up needed, that was unexpected too ? (making it two pull-ups, so far)

  • The boot tree doesn't need resistors for normal operation but if P59 is pulled down it will ignore the serial port altogether as this was my request for locking down production units. It seems though as if the analog circuitry introduces some kind of loading making it appear as a pulldown.

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  • jmg,
    Chip had a board that he hand soldered a P2 on and just a few resistors and some bodge wires to route power/etc.
    That was the one that he was using to make things work, that had good reset.

    When he tried the board that was from the P&P with all the parts it was showing the reset line being held low at the P2 pin. So they went back to his hand soldered/hacked board.
  • These are the P59 and RESN nets highlighted on the top layer for the revision which is almost the same as the current F version.

    BTW, I tested an actual P2D2 board with it connected to my CVA9 FPGA and it boots as it was designed to, without resistors.

    That RESn routing looks to require that the user has an external TRX+CAP reset ? - not everyone will have that on their any-UART-bridge they have at hand ?
    The CAP + Digital TRX on the earlier P2D2 looks the most forgiving reset design, as it should work with most any Uart bridge ?
  • Btw, i will record how i make a unit up manually with a solder paste syringe and in a toaster oven just so you can see how easy it is and just how good it comes out. When i saw Chip hand solder the p2 pin by pin i just thought "use the paste Chip".

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  • The pic Chip i use for reset is easy to program via the 8 pin prop plug and can handle all the various timings or edges without fail plus it supports reset on break.

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  • Btw, i will record how i make a unit up manually with a solder paste syringe and in a toaster oven just so you can see how easy it is and just how good it comes out. When i saw Chip hand solder the p2 pin by pin i just thought "use the paste Chip".

    Peter firstly congrats on your role in what we saw unfold today. Its awesome to be able to feed in one line of text and make cool things happen on the pins. And P2 is all of a sudden so very very real.

    Today was a fascinating study of the manual vs automated ways to produce 1 working board, but also with twists and turns eg plunging an endmill in vertically, deburring, smda overrides, soldering temp required to fill the hole on the back. Users will prefer one method over another due to their experience and perceived ease and thats fine, but it takes a heck of a video to sway people from their "i'm gonna do it my way" approach

    Personally I'd put a 3mm central hole on the back (we do this with Max10), it doesn't prevent automated assembly when you have a 10x10mm exposed pad. We use 50~60 watt irons and its fine for the 10x10mm exposed pads and leaded solder. Haven't tried lead free but don't see an issue.
  • 3mm center hole it is then!

    p2pad.png
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  • The pic Chip i use for reset is easy to program via the 8 pin prop plug and can handle all the various timings or edges without fail plus it supports reset on break.

    Which PIC chip ?
    Can someone with a more generic eBay USB-UART module, still easily pgm the PIC ?
  • Peter,
    Chip said he'd like a 0.1" hole thru to the gnd pad. That should still work fine as tubular said.

    BTW if all we have is two pullups needed then wow, what a success story :)

    Now, is there another broadcast tomorrow???
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  • Nice, 3mm is nice and friendly and wider than it is deep. I don't think anyones eyes are as good as when P2 was conceived

    These boards Parallax have - do they have the xcl2xx dual footprint on them?
  • Tubular wrote: »
    These boards Parallax have - do they have the xcl2xx dual footprint on them?
    I think that's been there a while.
    Tho Chip seems happy with a 1.8V set bench supply, a SMPS build may be useful for users doing a Max MHz, All core stress tests.

  • jmg wrote: »
    The pic Chip i use for reset is easy to program via the 8 pin prop plug and can handle all the various timings or edges without fail plus it supports reset on break.

    Which PIC chip ?
    Can someone with a more generic eBay USB-UART module, still easily pgm the PIC ?

    A motherboard for the P2D2 can easily have USB or anything else on it. The P2D2 is what it is, a versatile P2 module and if the pic isn't loaded then it doesn't matter, everything still works the same. The current P2D2 does have a reset transistor circuit for cheap USB TTL serial modules but its time constant is to allow for a Prop Plug too which has its own reset circuit etc. Let's not complicate things when it really isn't necessary.



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  • Let's not complicate things when it really isn't necessary.

    I fully agree, which is why I tend to prefer this...
    The current P2D2 does have a reset transistor circuit for cheap USB TTL serial modules but its time constant is to allow for a Prop Plug too which has its own reset circuit etc.

    over an added PIC, (needs programming), or needing to add a CAP+TRX externally.
  • Then they can use this version but I see the H version being a cleaner layout. What sense is there in going through the trouble of laying out a board that suits the DIY who use an ebay adaptor minority more than it does everyone else including myself?

    I like the clean simple pic chip and reset on break is really useful to have plus I can talk to it on P61 and find out the pcb temperature, its serial number, or even runtime etc. Consider it my little corner of the board but everyone else can just do what they do now, use a Prop Plug or plug the module into their board with their stuff.

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  • jmgjmg Posts: 12,310
    edited September 29 Vote Up0Vote Down
    Consider it my little corner of the board but everyone else can just do what they do now, use a Prop Plug or plug the module into their board with their stuff.
    Understood, & that's fine, it's just a shame to lose the CAP+TRX reset on board.
    Maybe a dual-layout is possible, for MSOP8 and CAP+TRX (& RST pullup?) - that cleanly allows any-USB module, including HS-USB ones.

    jmg wrote: »
    Might it not be an idea to pause the next PCB 'go', until Parallax have done a populated P&P P2D2 to catch any other issues that might need fixing ?

    Expanding on my comment, I'd say Chip's P2 numbers & reports already move things somewhat :smile:

    * The next P2D2 would logically be 2oz or 3oz, to help spread the heat.
    * The SOT89 regulators are going to be light for All cores/full MHz, and even the XCL220 is looking not quite enough, to power a P2 to where it can go.
    Q: Is it ok to use external power supplies for any All Cores/Full MHz, or should the PSU area change to be a better SMPS ?
    * Should some holes be included to allow P2 heat-sink support ?

    I found these earlier, I'll revisit their specs in light of Chip's numbers :
    AOZ3024PI looks useful wide Vcc, (4.5~18V), 3A, and PGood out, ~31c/3k
    70 mΩ internal high-side switch and 40 mΩ internal low-side switch (typ at 12 V) 110 mΩ / 50 mΩ typs at 5V
    SO8EP, 4.7uH, 500kHz
    VFB 0.788 0.8 0.812
    or
    NCP3170A/B OnSemi 4.5~18V 3A PGood 38c/2.5k 33c/2.5k Mouser. (if a part fits ok, there is some appeal to selecting OnSemi :) )
    90 mOhm High-Side, 25 mOhm Low-Side Switch (typ at 12 V) 100 mΩ / 29 mΩ typs at 4.5V
    SO8 4.7uH, 500k/1MHz
    VFB : 0.792 0.8 0.808

    or
    RT2751 4.0~17V 1.5A PGood 51c/2.5 << too low Io
    RT8299ZQW Richtek USA Inc. ADJ 3A SYNC 10WDFN (3x3) 22,500 stk $0.65943/1,500 PGood, 3~24V 3A, but 100mΩ / 100mΩ (contrast AOZ2261 26 mΩ / 12 mΩ)
    RT7258GSP Richtek USA Inc. ADJ 8A 8SOP-EP 15,000 stk $0.66402/2,500 4.5~25V 8A, but Single FET (needs external lower FET)
    TS30013-M000QFNR Semtech ADJ 3A SYNC 16QFN(3x3) 13,200 stk $0.46620/3,300 4.5V ~ 18V but 180mΩ / 120mΩ


    AOZ3024PI & NCP3170A/B look to be layout compatible. Both SO8, but AOZ3024PI uses exposed PAD as LX connect, whilst NCP3170A/B uses pin 8, & no exposed pad, otherwise same pins & Vref
    NCP3170A/B has the edge on lower Rds lower FET, which matters more at 1.8V reg

    perhaps Chip can ask OnSemi which regulator they suggest ?
    The NCP3170 says active, but it is in an older package than their other parts, and life cycle is less certain ?

    Looking at more modern QFN packages, finds the AOZ1236 / AOZ1237 / AOZ1267 show around 42c/3k, wider Vcc, PGood, and lower Rds than NCP3170, and smaller package QFN 4x4, 23 Lead EP2_S - but not looking easy to buy...
    Looks like the AOZ2261QI-15 is stocked (& Normal stocking) at Digikey, 54c/1k 49c/3k for 8A & 2.7V~ 28V, 22-QFN (4x4) 26 mΩ / 12 mΩ typ at 12V
    - wider Vcc range, and higher current, with lower switching losses, for a few more cents than NCP3170 ?

    Addit: a variant on AOZ3024PI is AOZ1022 - DFN 5x4, 8L + 2 exposed pads. (2 pins swap relative to AOZ3024PI )
    Vcc, (4.5~18V), 3A, and PGood out, ~57c/3k 97 mΩ / 18 mΩ internal low-side switch (typ at 12 V) 166 mΩ / 30 mΩ typs at 5V, Well stocked (6k) at Digikey, but not as well spec'd as the slightly cheaper AOZ2261

    Looks like AOZ1236 / AOZ1237 / AOZ1267 (4x4 QFN23) & AOZ2261QI 22-QFN (4x4) can all be layout compatible, giving more supply chain options ?

    A QFN24-EP 0.5mm footprint can be used as a quick early placement/routing test, as the QFN23/QFN22 skip 1 or 2 pins, and there are 2 inner TAB areas.
  • P2D2 does not have to be all end all. It can handle over 1A on the 1.8V supply and the two 3.3V regs both handle up to 800ma each. I have measured the temperature profile already and know that I can very simply glue a heatsink to the back or use a thermal pad between the back and a metal case etc etc etc.

    Feel free to make some extreme case pcbs though. I do appreciate the helpful info on parts but don't think I ever need to use them.
    Are you going to be evaluating any hardware at all?

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