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P2 hardware reference design and choices

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  • jmgjmg Posts: 11,655
    • Sheltered MicroSD (faces inward and protected from damage)
    I'm in two minds over that.
    I can see the benefits of some protection, but the RaspPi have cases designed and they face theirs out. ie you can replace the card, in a housed board.
    They have to use SD, whilst P2 does not. - ie someone can boot on SD, pgm the flash then remove the SD.

  • TubularTubular Posts: 2,983
    edited June 13 Vote Up0Vote Down
    Re connector order, I think you're right, jmg - P0~31 as it currently sits is compatible with a ribbon plugged in from the top, like a computer motherboard. +However if using a stacking connector like beaglebone the ribbon would plug in from below, in which case the current header for P32~63 would be correct.

    I guess it depends on Peter's intentions for the headers.

    I wouldn't get hung up matching the led boards / P123

  • jmgjmg Posts: 11,655
    Tubular wrote: »
    Re connector order, I think you're right, jmg - P0~31 as it currently sits is compatible with a ribbon plugged in from the top, like a computer motherboard. +However if using a stacking connector like beaglebone the ribbon would plug in from below, in which case the current header for P32~63 would be correct.
    True, I had not thought about top/bottom choices.
    Checking into right angle headers, I notice for those to have CCW linear pin order, (same as P2) they would need to bottom mount - not so natural.

    An alternative is to support headers and right angle ones too, in conventional top mounting, and then accept still linear, but reversed ordering
    so Pin 2 is Top left, bottom right, and P0..P31 is J1.Pin36..Pin5, P32..P63 is J2.Pin36..Pin5 - probably still tolerable.
    In this case, I think P32..P63 do the pair swap.

    Checking a PiZero, I see they have Pin2 Topleft convention, with Vcc.5V on pin 1 end. Natural to also follow that orientation.

    They map less than 32 io, (just GPIO2..GPIO26) and 2 for ID_EEPROM, but in a scattered pin map. I don't think they have byte-wide options on that bus, so P2 can skip as needed.
    Maybe just keep no-gaps on the SPI connector, in case that has a Quad mode ?

    For this PiZero connect, a second 40 pin connector would be added, with gnd.3v3.5v remapped as required.

    PCB cost of the Pi-strip is minimal, but the 'eyeball count' increases massively.
    The question then is do you include the mounting holes and curved corners of the Po zero. It would certainly make it very clear visually which 40 pin to use ! (adds a few mm to pcb length)

    In some designs this P2 board could then replace a Pi Zero. In others, it would work with a Pi Zero. (the beauty of flexible pins.)

  • Cluso99Cluso99 Posts: 13,769
    edited June 13 Vote Up0Vote Down
    The Pi connector is worse than the Arduino. It's a dog's breakfast :(

    BTW the microSD has benefits/losses either way around. I like to get at mine easily because I often change the card. Then again, I can see Peters' point of view too. Anyway, it's his board ;)
  • jmgjmg Posts: 11,655
    Cluso99 wrote: »
    The Pi connector is worse than the Arduino. It's a dog's breakfast :(

    Yup, but it is a standard... it also is short of 32io, hence the suggestion to do two 40 pin headers. - a sensible one, and a Pi one ;)

  • Cluso99 wrote: »
    The Pi connector is worse than the Arduino. It's a dog's breakfast :(

    BTW the microSD has benefits/losses either way around. I like to get at mine easily because I often change the card. Then again, I can see Peters' point of view too. Anyway, it's his board ;)

    Yes, I learned my lesson the hard with having those microSDs "accessible", or should I say "breakable". They are very thin and very easy to break and while they are great nicely protected inside a smart phone, having them stick out on bare boards means they will be broken. Once you have them inside a case and just protruding then there is no problem, or if the microSD connector is a full-depth push-push type then that's fine.But a bare socket style connector and extruding microSD card adds up to bits, not bytes.

    However, the pcb may end up with a connector on the reverse side but I may allow for the push-push type. The fact that I designed the board to have components all on one side and to be surface mountable does not stop me from using this in a standalone configuration with perhaps extra LEDs on that side too, just in case the board gets plugged in upside down too.


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  • jmgjmg Posts: 11,655
    Yes, I learned my lesson the hard with having those microSDs "accessible", or should I say "breakable". They are very thin and very easy to break and while they are great nicely protected inside a smart phone, having them stick out on bare boards means they will be broken. Once you have them inside a case and just protruding then there is no problem, or if the microSD connector is a full-depth push-push type then that's fine.But a bare socket style connector and extruding microSD card adds up to bits, not bytes.

    Anther approach could be to use the PCB to protect it ? - even to the point of a routed recess for fingers.
    There may just be room for that, assuming a Pi-zero width factor (mounting holes), looks like it could maybe fit ?

  • What's wrong with the Pi's GPIO connector?
  • jmgjmg Posts: 11,655
    Heater. wrote: »
    What's wrong with the Pi's GPIO connector?

    Nothing physical, the GPIO-pin numbers are just mapped a little jumbled.
    May not matter much, if they do not do byte-wide operations ..
  • The pins are all over the shop. So are the power and ground pins. It's an diabolical mess!
  • I don't think making this Pi Zero compatible is a good thing and yes their connector is a mess. This board is only the first of many but the important thing is that we have access to all 64 I/O so at the very very least you can use it as a breakout board for the P2 chip itself. Fully populated though, and it is stand-alone.

    These are the Pi Zero connections (really). What I like about the P2 is everyone of our pins are whatever we need them to be, and much more :)

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  • jmgjmg Posts: 11,655
    I don't think making this Pi Zero compatible is a good thing and yes their connector is a mess. This board is only the first of many but the important thing is that we have access to all 64 I/O ...
    Yes, If you read my suggestions carefully, I suggest two connectors - one that gives 32+32=64io, and a second one that is Pi-ready.
    Very little PCB cost in doing that, but opens up a large user base right there. Do not fit it if you do not use it...


  • Tubular wrote: »
    David Betz wrote: »
    Tubular wrote: »
    More than happy to send you some, David. Just PM
    Thanks for the offer but I suspect there are others who can make better use of these if you're giving them away.

    You're far too humble, David. We have a drawer full of these already made up sans stackable header, so there would still be plenty left. It'd really be no trouble to send you a couple, it'd just take a week and a half to get to the USA
    "You've got mail!"

  • After I make some final changes, perhaps for the header pinout and/or the oscillator options I might order some boards just for the fun of it. Well, not just the fun of it, but so I can check out the physical layout, assemble the other components on there, and just make sure it all works, on the good chance that P2 will work. I can connect my FPGA board to those header pins to exercise the boot memory etc.

    If I order 20 then there are enough of them spare if anyone else wants them and there is still plenty of time to make revisions and be ready for P2. The hope is that if everything goes well we should be able to mount a piping hot P2 onto an assembled and tested board, and this chip can be manually soldered at this point easily enough using the old tack down, flux, and solder blob flow technique.

    I notice that seeed are fine with 6/6 rather than the 8/8 widths that I normally keep my boards to.

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  • jmg wrote: »
    I suggest two connectors - one that gives 32+32=64io, and a second one that is Pi-ready.
    Very little PCB cost in doing that, but opens up a large user base right there. Do not fit it if you do not use it...

    Is this intended to connect a P2D2 to a Pi or to allow Pi Add-Ons and HATs to be attached ?

    The connections need to be different for each use case, and each use case is useful to have. Maybe it needs two 'Pi compatible' connectors' ?
  • Here is the pcb with pins flipped on one side and some extra silkscreening. Trying to make this compatible with any other pinout is not what this particular board is about but I'm sure I could roll out some variations of it for those purposes.


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  • I notice that seeed are fine with 6/6 rather than the 8/8 widths that I normally keep my boards to.

    Looking really nice, Peter.

    Yeah 6/6 mil seems to be the new standard available pretty much everywhere, including remaining local fabs. All the local fabs now seem to use LPI optical silkscreen, which is good down to around 4 mil (certainly 6 mil)

    At some stage oshpark 2layer improved from 27/13 via pad/hole to 20/10, which makes a big difference. Thats what I designed to.
  • Why isn't there more of a gap between the center ground square underneath the P2 and the voltage supply ring surrounding it? What if the paste squeezes out?
  • jmgjmg Posts: 11,655
    Here is the pcb with pins flipped on one side and some extra silkscreening. Trying to make this compatible with any other pinout is not what this particular board is about but I'm sure I could roll out some variations of it for those purposes.

    That's fixed to make the ribbon cable linear, but is not 40 pins, & the two connectors are not swapable, as VCC is not in the same place.

    ideally, they are right angle compatible, so pin 2 is top-left/bottom right, which does mean Vcc need to run to diagonal corners.

  • jmgjmg Posts: 11,655
    hippy wrote: »
    jmg wrote: »
    I suggest two connectors - one that gives 32+32=64io, and a second one that is Pi-ready.
    Very little PCB cost in doing that, but opens up a large user base right there. Do not fit it if you do not use it...

    Is this intended to connect a P2D2 to a Pi or to allow Pi Add-Ons and HATs to be attached ?

    The connections need to be different for each use case, and each use case is useful to have. Maybe it needs two 'Pi compatible' connectors' ?

    Do you mean to support both parts-up and parts-down mating ?

    The Pi connector does not change in either case, and a simple matching of the added P2D2 Pi-40 header to the Pi Pin pinout, is easiest to follow.

    That means existing Pi daughter cards can plug in, and a P2D2 can also plug into a Pi, on a parts-up basis. (eg the Pi can be in a case then)
    P2 can easily manage master/slave as any pins can be Tx/Rx
    If there are 2 Pi-40's added, P2 can even connect to two Pis, or users can choose which pin set to allocate.

  • jmgjmg Posts: 11,655
    After I make some final changes, perhaps for the header pinout and/or the oscillator options I might order some boards just for the fun of it.

    You don't want to wait until Chip reports the Icc numbers he said OnSemi was running, a little while ago ? ( & maybe the Idd crowbar numbers, if OnSemi have those ?)

  • I will still have a look at the oscillator options and think about the header connections and if Chip comes back with some figures it probably won't make any difference as I'd like to press the "print" button for some samples. If they're not quite right then I've got plenty of time to test and change things etc.


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  • jmgjmg Posts: 11,655
    I will still have a look at the oscillator options ....
    To keep things simple there, I'd suggest keeping the parts/routing as is, but just making the PADS larger (inwards direction ) on both XO1 and X1, to allow those smaller package parts to fit.

    ie Xtals of down to (2.00mm x 1.60mm) and Osc modules of down to (1.60mm x 1.20mm) - a 4 pad Xtal fits rotated ~ 45'

    That likely means the via under the centre of XO1 moves & the 1V8 track is all that runs under X1

  • jmg wrote: »
    I will still have a look at the oscillator options ....
    To keep things simple there, I'd suggest keeping the parts/routing as is, but just making the PADS larger (inwards direction ) on both XO1 and X1, to allow those smaller package parts to fit.

    ie Xtals of down to (2.00mm x 1.60mm) and Osc modules of down to (1.60mm x 1.20mm) - a 4 pad Xtal fits rotated ~ 45'

    That likely means the via under the centre of XO1 moves & the 1V8 track is all that runs under X1

    I was thinking that I might not allow for those really tiny oscillators in the 2016 packs due to being too fiddly and so the footprint is fine for 5032 and 3225 but I will nonetheless add this in. Maybe the 2-pin crystal footprint is unnecessary and the other thing is what frequency should we use. If it isn't a crystal I think we have a lot more range to work with since the PLL is quite flexible. I was thinking 12MHz originally but 48MHz should be fine too as they seem quite common.

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  • jmgjmg Posts: 11,655
    ... and if Chip comes back with some figures it probably won't make any difference ...

    Hmm, that MCP1700 worries me...
    It has a very low Iq, which means the dynamic response is poor, and PSRR is also poor. Super low Iq is not important for P2. It also is only 6V rated.
    MCP1700 data shows close to 500mV spikes with a modest 100mA load step. The LDL1117 shows a more modest sub-100mV step for a 1.2A load change.

    The much newer LDL1117 is cheaper, much less overshoot on load changes, and much higher/broader PSRR (~90dB) for better analog performance & is 18V rated

  • Peter JakackiPeter Jakacki Posts: 7,452
    edited June 14 Vote Up0Vote Down
    That's what testing is all about as I can simulate sudden CPU and I/O loads and check it. But there are a lot of regulators available in that same package so the final product may use a different part. Take this AP7215 for instance for 26 cents, it can handle 600ma and its load transient response is very small even with a sudden 300ma load change. But it also comes back down to cap choice and layout.

    SOT223 packages are bulky for a board this size plus this is a reference design too and I don't want to promote overly bulky parts of any kind, I have seen enough of those on so many Prop boards that have been so unnecessary. For instance, whenever someone wants to use a MOSFET, then there is this huge TO220 package plonked onto the board when a tiny SOIC8 was more than 10 times capable. Same goes for amp chips, VGA connectors etc, bulky electrolytics, and of course, regulators.

    Also: LEDs don't "need" 20ma to work, usually 3ma is more than bright. Boards can be powered from USB as the current is protected and is not going to kill anything, the real danger is always ground loops. Linear regulators have their uses but switchers rule and shouldn't be TO220 monsters either, take a look at that tiny SC202A. Surface mount hand soldering is easy, just don't use needle tips, a clean flat one instead plus flux. Oh sorry, I'm ranting now :)

    btw, I noticed an AZ1117CR-3.3TRG1 rated at 800ma for around 27 cents.

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  • On the all-in-one switching reg I'm really disappointed Murata aren't continuing the LXDC2UR which were similar size to the SC202a but includes the output cap

    I guess the output cap isn't a huge deal, if being dual-footprinted with a Linear reg that has an output cap anyway

    If the peak 1v8 current exceeds 600mA, whats available? TI have a similar footprint with whopping 1.2A current. Not amazing efficiency nor particularly cheap, but certainly much better than an LDO. 9 ball bga
    http://www.ti.com/lit/ds/symlink/tps8268180.pdf
  • Murata LXDC2UR for reference

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  • Tubular wrote: »
    On the all-in-one switching reg I'm really disappointed Murata aren't continuing the LXDC2UR which were similar size to the SC202a but includes the output cap

    I guess the output cap isn't a huge deal, if being dual-footprinted with a Linear reg that has an output cap anyway

    If the peak 1v8 current exceeds 600mA, whats available? TI have a similar footprint with whopping 1.2A current. Not amazing efficiency nor particularly cheap, but certainly much better than an LDO. 9 ball bga
    http://www.ti.com/lit/ds/symlink/tps8268180.pdf

    If P2 needs more than 600ma at 1.8V I think I will be looking for another CPU!!! 1W+ is still a lot of power. Anyway I thought about that and thought that maybe I would still have the LDO sitting there but the SC202A set for 1.85V so that the LDO would only cut in during current limit. Maybe...

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  • Peter JakackiPeter Jakacki Posts: 7,452
    edited June 14 Vote Up0Vote Down
    Tubular wrote: »
    Murata LXDC2UR for reference

    Nice part but it seems Murata are getting out of the LXDC business as they are losing money. This is from their withdrawal notice:
    LXDC business has been very serious situation in the point of profit.
    We have no choice but to withdraw all LXDC business.
    This is where the bean counters look at the profit line instead of the future business line.....

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