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Erroneous inter-Prop pull-down behavior
I'm splitting a workload between two P8Xs, using a single-wire simplex data transfer routine.
One cycle-shaving technique I'm using is loading outa
at initialization and toggling dira
to perform an ACK
on the RX Propeller. This necessitates a pull-down resistor on the data line to ensure that the output responds appropriately to the high-impedance "floating" state the pins are in when they are set as inputs. I'm using a standard 10K resistor value for this purpose.
So the setup is:
Prop #1 P0 -> Prop #2 P0
10K -> Vss
The problem however that that the output is never going high, so no ACK
and I discussed the issue and potential causes here
Code in question:
or outa, RxPin ' Setup ACK output
rxbuff ' Send current buffer...
' Prepare for next buffer reception
or dira, RxPin ' Set RX pin as output for ACK
andn dira, RxPin ' Set RX pin as input
jmp #rxbuff ' Loop infinitely
Marko helped identify the problem as the frequency response, but I was wondering whether anyone had seen the same behavior or dealt directly with the same problem before. Thanks!