I've started working on the smart pins.
The MSGOUT needed a little fixing, and it seems to be working now.
What is needed, next, is the message receiver that goes into the pin circuit.
I realized that pin message I/O could be done in the background and also be event/interrupt sources, so that you could automate smart-pin updating with interrupts, never stalling the cog.
I figure the first thing I'll make is a PWM. There are lots of simple output modes to tackle.
Later, I'll get the pin to output messages, so that we can implement ADC counters, rotary encoders, and what not.
In the next FPGA release, there will be some rudimentary smart pin circuits. Thanks to Ariba, we have some MAC-like instructions now to facilitate DSP, without needing dedicated accumulators.