P2 bootload from Flash (and optional SD)

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  • potatoheadpotatohead Posts: 10,139
    edited 2015-11-14 - 17:57:26
    If we are gonna do this, I very strongly recommend a partition.

    Mere block support sort of works, until it doesn't. Depending on "first file" copied to fresh SD card to insure contiguous space works, until it doesn't too.

    All that is needed is to make a propeller partition, and make it's type empty, or just not FAT or something recognizable. I did this last time, and the data is in the hot threads. I can find it, but the gist of it was:

    1. Make partition. Under Linux, this is dead simple.

    2. Prop reads MBR, sees partition, collects block offset

    3. Prop reads blocks from block offset to obtain whatever it's boot image is going to be.

    User copies image into partition using "dd" or similar. We could make a little exe for windows that adds a partition without too much trouble. And a P2, once running, could very easily prep additional SD cards, as can a P1 right now!

    It's not hard to do this, and if we do, we've added the minimum device support to get along with the rest of the world with no hassles.

    Partition support is the working minimum when there isn't a filesystem, and the storage device isn't single purpose. If that SD ends up in a PC at any time, it's not single purpose.

    I submit the SD card will rarely be single purpose. The compelling idea of SD card boot is we get a boot device, but we also get a filesystem, and or assets, data, code, whatever we want on that filesystem that is very easily manipulated by an average user on a PC of some kind. A really common use case is going to be to provide signed booter, for a prop with fuses set, an unsigned one for a prop with open fuses. That booter will boot, be filesystem aware, and run whatever things a user has copied over with a PC. Partition support will insure this works well.

    When we pick a partition ID well, windows ignores it, and that keeps the boot blocks out of harm's way. They can use the exe, or a P1, or a P2, or Linux to prep the card, and put their boot image on it. Once this is done, refreshing the boot image is dead simple.

    From there, that boot image can be filesystem aware. If it is, they then can drop their own files onto a FAT partition, and that's dead simple too.

    Doing this will save people a lot of grief and it would make using an SD card with P2 simple, robust and powerful.

    I did grab a whole pile of SD cards at the time we were discussing this and all of that allowed for a partition. I booted Ubuntu at the time and just ran a few commands to get it all done. Again, a small script, exe file, or P1 / P2 prepped to do this isn't hard.

    I'll go track down the work done last time, just for reference in this discussion.

    Again, if we are gonna do this, it's attractive from a "shiny thing" feature standpoint, but I would really prefer it not be a hack. A handful of instructions will read the MBR, correctly identify the partition block offset. That's real support, best practice. IMHO, that is what the chip should do, if we decide to put SD into the booter of the chip.

  • Agreed, an allocated partition is an improvement over using imaginary bootstrap space.
  • Yes. I'm actually on the fence with the concerns Kye expressed. They are valid, but they can be designed for too. My preference is to boot with something else that then handles the SD, but if we go with SD, let's do it best practice so that the SD works as expected for people. Partitions are how we do that when we aren't providing real filesystem support.

  • Here is a link to my final solution for the SD card booter in an old thread. It works with a second partition, or with a pointer in sector 0, or will search a file with a signature if no partition or pointer found. Always only do a search is way too slow - it can take 20 seconds to search through the first 1 MB.
    The size of the bootcode is under 200 longs as far as I remember.

    forums.parallax.com/discussion/comment/1122184/#Comment_1122184

    I will not participate if the same discussion starts again - it was very tedious.

    Andy
  • Yes, agreed. I like your solution Andy.
  • jmgjmg Posts: 14,567
    edited 2015-11-14 - 18:53:39
    evanh wrote: »
    PS: Another way to put this is: It's important that SD not be the primary cold boot device.
    Agreed, but I don't think the plan was for SD to be the primary cold boot device?
    A more formal SD boot should always be after the simplest SPI boot.

    A header tagged system is simple, and allows varying reply delays.
    A quick look finds 15c/1k 25C16 devices in small packages, with 03H read command and 16b Addr (SO on 24th clk)
    Larger parts are not much more expensive, 23c/1k for 4MBit, with 24b address (SO on 32nd CLK)
    (that's cheaper than a 24C256 i2c device)

    Even larger parts move to 32b address (SO on 40th clk)

    The header tag would wait for the start on all cases, and a simple offset of a few bytes would allow the same image (small) to be placed into any SPI candidate. An upgrade from 24b Adr to 32b Adr SPI would still work.
    MISO pin would likely have a pullup resistor enabled.
    Ariba wrote: »
    Here is a link to my final solution for the SD card booter in an old thread.
    ..The size of the bootcode is under 200 longs as far as I remember.
    Cool. That should be easy to try, as a last-tier loader ?
    I think the ROM-size is less of an issue than it used to be, as P2 now uses a standard cell.

  • I don't think booting from removable media is a very good idea.
    But, I could see someone wanting that to reduce costs...
    Shouldn't take too much rom space for code to mount sd and then scan root directory for a certain filename
  • This was all discussed in a long thread a couple of years ago.

    IMHO it was derailed by scaremongering.

    IMHO a simple SD boot should be possible that does not require a Flash device to be present. It only adds unnecessary cost and space if a SD device will always be present.

    There are boot sectors present on an SD card which can be used to start a full loader in whatever format the user requires.

    Either consider SD as the optional primary boot device (check Flash first, then SD), or stop this discussion now! The solution is simple but I am not going to waste my time until it's agreed to make SD a bootable device without flash, if flash is not found.

    For reference, I have shipped prop boards that have a simple SD boot loader in EEPROM. I have not had any problems although I do recommend using SanDisk SD cards.
  • Peter has just finished saying that SPI Flash can never work unless we maybe commit to a single brand. It's SD only then.
  • Heck, as long as SD is the second or third boot option, flash and serial will work just fine right?

    Those of us who want to go the SD route do, and if it goes bad, others of us get "told 'ya" rights and everyone has a solid fall back.

    If there is a partition aware scheme, great: otherwise, I know I'll be using a flash loader that then uses the SD in a file system aware way. And if there is a partition, I'll just do the same, so that the experience from there is just files and names.

    So I guess I don't care.
  • I don't know why there wouldn't be room in ROM to try a couple different brands of SPI flash... You just go through a list and try to read the device ID and then you know what you have...
  • I think the original proposal was for SPI EEPROM, I note JMG has just listed one, rather than SPI Flash. So, it was just a bit of confusion there. SPI Flash is not an option.

  • RaymanRayman Posts: 11,682
    edited 2015-11-15 - 00:58:51
    I haven't looked at this in a long time, but I have to think that if there were a 512kB SPI eeprom, it would be very expensive and compared to SPI flash.

    Just checked Digikey and there is one option there, but it is out of stock and MOQ is 3000 pieces... Was less than a dollar at that qty. though.
  • jmgjmg Posts: 14,567
    evanh wrote: »
    Peter has just finished saying that SPI Flash can never work unless we maybe commit to a single brand. It's SD only then.
    Where exactly is that claim made ?

    That's not what I see in the data, nor in this link I gave in another thread.

    http://www.spansion.com/Support/Application Notes/High_Density_SPI_Core_Command_Sets_AN.pdf

    The READ command seems universal at 03H and if a simple start string is used (as Chip mentions) as begin-key, then the 2/3/4 byte address fields are supported by that.
    That represents a very wide range of possible valid boot devices, from small Eeproms to medium-size minimum cost SPI FLASH, to larger FLASH Serial parts with 32b address fields.
    Primary boot (ROM) can be quite small, (1 bit SPI) and from there user code can invoke fancier secondary boot, like QuadSPI-DDR for example. (or fast MODE SD or smarter SD boot... )

    Rayman wrote: »
    I haven't looked at this in a long time, but I have to think that if there were a 512kB SPI eeprom, it would be very expensive and compared to SPI flash.

    Just checked Digikey and there is one option there, but it is out of stock and MOQ is 3000 pieces... Was less than a dollar at that qty. though.
    Yes EEPROM have poor price/bit compared to Flash, but I listed one above because it comes in small packages, for a lower price than small package FLASH.. thus it may make sense for primary boot, then advanced SD boot.

  • Peter JakackiPeter Jakacki Posts: 9,929
    edited 2015-11-15 - 03:20:20
    I think there is way to much confusion regarding what is being asked for. Let me reiterate:

    1. Update the P2 bootloader to handle th 25Q80 SPI Flash that I have on my DE2-115 adaptor

    2. If possible also allow for boot from standard SD SDHC cards from fixed sectors, no filesystem/partition checking.

    So I need #1 to be able to really exercise my system as a stand-alone development system rather than being reliant upon PNut to boot the P2.

    Now SD is very very easy to interface, just SPI mode only, I don't know what QSPI has to do with this at all other than the fact that there is a licensed 4-bit SD mode which us unlicensed users don't use. Use SECTOR ZERO which has plenty of free space either for a second-stage SD bootloader or for the pointer/crc/metadata to a fixed absolute sector. Since SECTOR ZERO is always the same with an MBR format then it doesn't matter what partition or FAT method etc is used, as long as we have access to SECTOR ZERO then the boot image sector it points to can be the start sector of a file or anything. EASY.

    In reference to something that Cluso99 mentioned please don't let this option be "derailed by scaremongering". It's simple, quick, easy, and an OPTION.

    EDIT: Just specify genuine SANDISK and if anyone wants to take a chance with other less compliant brands then that's their worry.

    Here I threw some P2 code into the first 256 bytes of sector 0 and had it write a header and absolute sector and crc in the first 32 bytes. No problems.
    BTW. $1581C0 at 00.0010 is actually the start sector of the file "P2BOOT.IMG".
    TF2$ .FAT
    Mounted 795F.06B0-5917.5697          P2DEV     FAT32   3,955MB (32,768/cluster) ok
    TF2$   ok
    TF2$ 0 @fat . 38A2 ok
    TF2$ 1 @fat . 3C51 ok
    TF2$ @root 9 >> . 4000 ok
    TF2$ 0 $200 SD DUMP
    00.0000: 50 32 20 42 4F 4F 54 4C 4F 41 44 45 52 20 00 00    P2 BOOTLOADER ..
    00.0010: C0 81 15 00 37 69 BF E9 B4 06 EC FC B4 04 EC FC    ....7i..........
    00.0020: 28 02 EC FC B4 00 EC FC 20 7E 65 FD 70 00 00 FF    (....... ~e.p...
    00.0030: 00 3E 04 F6 22 4A 00 F6 02 4A 84 F1 00 48 04 F6    .>.."J...J...H..
    00.0040: 25 48 50 FC 25 4C 00 F6 04 4C 84 F1 26 48 60 FC    %HP.%L...L..&H`.
    00.0050: 22 F0 03 F6 00 48 04 F6 24 0A 60 FD 24 2A 60 FD    "....H..$.`.$*`.
    00.0060: 28 40 60 FD 08 04 DC FC 28 42 60 FD 1F FE 77 FA    (@`.....(B`...w.
    00.0070: 01 46 84 F0 18 46 4C F0 61 47 44 FC 10 00 90 AD    .F...FL.aGD.....
    00.0080: 01 48 04 F1 25 48 50 FC F3 3F CC F9 C0 FF 9F FD    .H..%HP..?......
    00.0090: 28 42 60 FD 1F FE 77 FA B4 FF 9F CD B4 00 EC FC    (B`...w.........
    00.00A0: 28 02 EC FC 00 00 00 00 24 00 00 00 66 00 00 00    (.......$...f...
    00.00B0: 00 00 01 00 01 A8 6B FD 3E FA 67 A4 3E F6 67 A4    ......k.>.g.>.g.
    00.00C0: 73 22 C0 AE 41 22 C0 5E B8 05 B0 FD C4 05 B0 FD    s"..A".^........
    00.00D0: C8 05 B0 FD CC 05 B0 FD 61 A9 27 FB 2D A8 63 FD    ........a.'.-.c.
    00.00E0: F4 FF 9F FD C2 01 78 FC 10 AA 63 FD 01 AA 87 F1    ......x...c.....
    00.00F0: 7E AA 17 F2 01 84 07 C1 EC FF 9F CD 31 00 60 FD    ~...........1.`.
    00.0100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    00.0110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    00.0120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    00.0130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    00.0140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    00.0150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    00.0160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    00.0170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    00.0180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    00.0190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    00.01A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    00.01B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02    ................
    00.01C0: 03 01 0B 7D FD BE 00 20 00 00 00 E0 75 00 00 00    ...}... ....u...
    00.01D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    00.01E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    00.01F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 55 AA    ..............U. ok
    TF2$ 0 $4000 SDMAP2
     $00.0000: *...............................................................
     $00.1000: ................................................................
     $00.2000: *...............................................................
     $00.3000: ..................................****************************** ok
    


  • jmgjmg Posts: 14,567
    edited 2015-11-15 - 02:46:35
    So I need #1 to be able to really exercise my system as a stand-alone development system rather than being reliant upon PNut to boot the P2.

    So you mean SPI boot is tried first, then SD load ?
    I think actual Boot order is
    1) Serial ( timeout = ??, skip-UART load pin ? )
    2) SPI (1 bur using 0x03 READ ) ( what MHz SCK ?)
    3) Possible Other (here SD) ?
    Now SD is very very easy to interface, just SPI mode only, I don't know what QSPI has to do with this at all

    If the primary SPI boot can be very compact, I don't think QuadSPI or QuadSPI-DDR etc need to be in ROM - they can be part of the tertiary loader.

    I would expect anyone loading 512k files to be using QuadSPI, or better.
  • evanhevanh Posts: 10,229
    edited 2015-11-15 - 03:08:21
    I interpret Peter's #1 as only needed temporarily just for FPGA based testing.

    The finished Prop2 will support SPI EEPROM instead.

    Here's Peter's earlier comment on SPI Flash ...
    There is also the problem I see of varying specs for SPI Flash including the rather large and variables "sectors" whereas SD is very easy to handle with nice little even 512 byte sectors and a standardized protocol and command even from brand to brand etc.
  • To be clear on the SD support: Any SD card functionality in the Prop2 mask ROM puts a burden of commitment to implementing a power control circuit to the SD card on at least all early reference designs.
  • jmgjmg Posts: 14,567
    edited 2015-11-15 - 04:18:54
    evanh wrote: »
    I interpret Peter's #1 as only needed temporarily just for FPGA based testing.

    The finished Prop2 will support SPI EEPROM instead.
    That's not my understanding.
    Primary device Boot BOM will focus on the price sweet-spot of SPI Flash, not EEPROM.

    Present sweet-spot looks around 4-8Mb & before P2 is real, that will likely move upwards.
    8Mb+ is a natural P2 size, as that matches the ~2x Memory headroom of P1 products.

    SO-8 is cheapest, but largish, and if I focus on smallest-package parts, eg 3x3mm gives 32Mbit
    N25Q032A13EF440E Micron 39c/3k
    Addit: Digikey search missed a few :
    Winbond 2x3mm package
    W25Q40CLUXIG 4Mb 31c/4k
    W25Q80BLUXIG 8Mb 35c/4k


    evanh wrote: »
    Here's Peter's earlier comment on SPI Flash ...
    There is also the problem I see of varying specs for SPI Flash including the rather large and variables "sectors" whereas SD is very easy to handle with nice little even 512 byte sectors and a standardized protocol and command even from brand to brand etc.
    ? SPI Sector size does not affect boot ?

    All you need to SPI boot, is to be able to start streaming data, from a fixed location, and that just needs a 0x03 READ command and then 32b of 0x000000 sent.
    That can address all SPI parts with 16/24/32b address fields. (covers 2k bytes to > 1GB)


  • Peter JakackiPeter Jakacki Posts: 9,929
    edited 2015-11-15 - 03:28:59
    The mixed sector size may not be a problem and certainly has nothing to do with just reading from it but the P2 bootloader will have to write to it at some point and so the device will have to be one that can be supported, such as the WInbond 25Q80 but these chips change every season too. By way of contrast SDHC sectors are small, fixed and easy and the protocol is standard. However I would still expect the P2 bootloader to support SPI "FLASH".

    512KB load from SPI only SD I can read in around 2 seconds on the current P1 but well under a second on the P2. However let's be realistic, who will load 512KB of code? I expect to have no more than maybe 64 to 128K at the very most but need room for buffers and video etc. So the typical load will be under 128KB I would expect.

  • evanhevanh Posts: 10,229
    edited 2015-11-15 - 03:50:23
    Please separate any talk of booted vs booting. Talking about writing back to these is not part of the first stage boot process. Unless it somehow impacts the first stage booter, like the SD reset problem, please keep the talk to what the Prop2 mask ROM will be able to handle directly itself.

    So we are now saying that there is no distinction between SPI Flash and SPI EEPROM, right? They can both be used on the simplest of first stage booting then?
  • jmgjmg Posts: 14,567
    edited 2015-11-15 - 04:03:48
    However I would still expect the P2 bootloader to support SPI "FLASH".
    Good, seems most are in agreement ?
    512KB load from SPI only SD I can read in around 2 seconds on the current P1 but well under a second on the P2. However let's be realistic, who will load 512KB of code? I expect to have no more than maybe 64 to 128K at the very most but need room for buffers and video etc. So the typical load will be under 128KB I would expect.
    Those numbers do raise an interesting question of volume production config.
    The bottle-neck is likely to be Serial Speeds - now the ROM is a little larger, can the Default serial loader have broader Auto-Baud support ?
    12 MBd would be a natural target - what is the spec for P2 RC boot osc speed & expected Precision ?


  • jmgjmg Posts: 14,567
    evanh wrote: »
    So we are now saying that there is no distinction between SPI Flash and SPI EEPROM, right? They can both be used on the simplest of first stage booting then?
    Yes, from what I read, they have the same 0x03 vanilla READ command, and if a simple header string is used, (as per Chip's comment) that then should tolerate the varying delays to start emitting data from the 16/24/32b Address length in a wide range of SPI memories.

  • I think I'd prefer a single stage boot straight from SQI flash...
    It's simple, cheap and fast...
  • Yep, that's all that's really being discussed here. It's a just a question of how many options there are for the first stage.
    - The Prop1 has two options: UART and I2C.
    - It's looking like the Prop2 could end up having three options: UART, SPI and possibly also SD card.
  • mindrobotsmindrobots Posts: 6,506
    edited 2015-11-15 - 14:04:09
    If a non-quad SD can be supported as easily as it sounds, I don't see the issue. If a board is built to use simple SD, then it isn't wired to support Quad SD. If it is wired to support Quad SD and the developer pays for it, then the developer takes on the responsibility to make sure all the Quad SD corners are covered. Not a P2 boot issue, it supports the 3 primary boot options and that's it.
  • Peter JakackiPeter Jakacki Posts: 9,929
    edited 2015-11-15 - 15:28:37
    We have always had removable boot memory for the P1, it's called a EEPROM socket. Having removable boot memory in the way of an SD card is not at all any different except better plus you can access the card on your PC. There's also no sense in arguing for QSPI Flash only as a minimal boot configuration would need to be supported and SPI is the way to go. If SPI is supported then SPI SD sector zero is just as easily supported too. Having the basic boot configuration allows the user to boot a QSPI bootloader if that's what they really want etc.

    The plan I favor for SD boot is to use the bootstrap code area from address 0 in sector 0 which has at least 218 bytes available.
    $00: P2BL (boot signature)
    $04: Starting sector of image (non-zero)
    $08: Number of sectors to read
    $0A: Header CRC (CRC16)
    $0C: Image CRC
    $10: Metadata

    It's even quite possible to put the actual image in sector 1 onwards too.

  • We could have it as per the common boot-block method - load the first block and execute it, The End. What happens next is totally up to what got loaded in those 512 bytes.
  • jmgjmg Posts: 14,567
    evanh wrote: »
    We could have it as per the common boot-block method - load the first block and execute it, The End. What happens next is totally up to what got loaded in those 512 bytes.
    That would be the most common use, but the P2 has a variable length boot choice, so that 512 is no longer locked in stone.
    With a simple [preamble-key + length + Data + Check], users can load from almost anything, in one or two stages.

    A different preamble could be used for two stage loading, and the PC side tools could have a small set of two stage loaders they prefix to user code.
    All the ROM has to be able to do, is load the first, vanilla SPI image (of any user define length).

  • evanhevanh Posts: 10,229
    edited 2015-11-16 - 03:57:24
    Executing the first block as a boot block is about just the following of MBR boot process is all. Second stage then gets defined by the code in the boot block.

    Another MBR compliant boot process would be what Potato outlined - read the partition table in the first block to extract the location of the Prop's boot partition. Then perform a more lengthy read of that partition to load the boot image. This boot image could have framing around it for extra checks. No second stage needed in this case.
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