The New 16-Cog, 512KB, 64 analog I/O Propeller Chip - Part 2

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  • Dave HeinDave Hein Posts: 5,309
    edited November 15 Vote Up0Vote Down
    Dave Hein wrote: »
    P2 Watch:
    81 days since the end of Spring.
    12 days to the beginning of Fall.
    52 days to November 1st.
            June                  July                 August               September
    Su Mo Tu We Th Fr Sa  Su Mo Tu We Th Fr Sa  Su Mo Tu We Th Fr Sa  Su Mo Tu We Th Fr Sa
       -- -- -- -- -- --            1  2  3  4                     1         1  2  3  4  5
    -- -- -- -- -- -- --   5  6  7  8  9 10 11   2  3  4  5  6  7  8   6  7  8  9 10 -- --
    -- -- -- -- -- -- --  12 13 14 15 16 17 18   9 10 11 12 13 14 15  -- -- -- -- -- -- --
    21 22 23 24 25 26 27  19 20 21 22 23 24 25  16 17 18 19 20 21 22  -- -- -- -- -- -- --
    28 29 30              26 27 28 29 30 31     23 24 25 26 27 28 29  -- -- -- --
                                                30 31
    

    Interrupts and increased cog RAM. This is stuff that we've been begging for for years, and somehow it gets added in the last few weeks of a 400-week design project. I'll have to go back and look at my wish list again to see if something else can be added. :)

    That was from September 2015 -- about 110 weeks ago. That was silly of me to think that the P2 was in the last few weeks of design. The first FPGA image did get released in September 2015, which was supposed to start the 6-month clock till the event at Parallax.

    EDIT: The previous poster deleted his message, which quoted a post that I made 2 years ago. His deletion makes my comment confusing without the context, so I inserted the quote into my post.
  • On the bright side, the lengthened process is letting us accumulate more frequent flyer miles, with which to get to Rocklin when the party happens.
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