Licensing the Propeller 2 FPGA: For Serious Commentary and Consideration

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Comments

  • Jeff, don't beat yourself down.

    You got to a bad place and now you are in a better place.

    I suggest contributing here for a bit to flesh out your thoughts. Then we can proceed.

    Parallax is busy. Nothing more.

    Let's do the work to find the merits right here so Parallax has something to respond to.
    Do not taunt Happy Fun Ball! @opengeekorg ---> Be Excellent To One Another SKYPE = acuity_doug
    Parallax colors simplified: https://forums.parallax.com/discussion/123709/commented-graphics-demo-spin<br>
  • Note people designed products with the P2 image.

    Do not taunt Happy Fun Ball! @opengeekorg ---> Be Excellent To One Another SKYPE = acuity_doug
    Parallax colors simplified: https://forums.parallax.com/discussion/123709/commented-graphics-demo-spin<br>
  • $375 !!!

  • LeonLeon Posts: 7,619
    edited 2015-07-08 - 19:15:32
    It is expensive, but they only made 30 of them. A large part of the cost will be the FPGA, Parallax won't have had much of a discount. Even at that price they will be losing a lot of money on them.
    I'll stick to my BeMIcro CV A9 ($149 with a much bigger FPGA).
    Leon Heller
    G1HSM
  • Sad me. I'm too poor for this game. 
  • Well I'll take that as a response... 
    <br>
  • Well I'll take that as a response... 


    .. and it's the same response you got non officially from the forum users that know the FPGA market.You just don't want believe it. The FPGAs that are needed to fit a P2 are really big and very expensive, and they have still not the analog features that will make the P2 unique.On the 1..2..3 board Parallax needs to add costly video DACs to emulate 6 analog outputs, while the P2 silicon will have such a DAC on every pin (64), and will cost a few $.
    Andy
  • koehlerkoehler Posts: 564
    edited 2015-07-09 - 00:28:41

    If people really want something like the above, I think the closest you are going to get in the near future could be from the lowRISC project
    .
    The dual-core Masters with 4/6/8+ Minion cores with what appears to be something similar to smartpins seems relatively close to the P2 feature. Tagged memory is also an interesting incusion, as are a host of others. And this doc is circa 2014: http://www.lowrisc.org/downloads/lowRISC-memo-2014-001.pdf

    There has been a lot of Parallax time/effort/$$ spent on the past years of R&D, and still more in the next 6-12 months, especially with contract vendors assisting. I just wonder if they can beat lowRISC to market, and more importantly, keep any sort of market when others can take completely free IP/Designs and just start fabbing them at cost.
      lowRISC seems like it will be on FPGA very, very soon, with some silicon in a quarter and a half?
    I may be wrong, but this looks like it could be one of the perfect storm things where there is going to be a real disruption.  Having a no license require IP block is potentially industry changing.


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  • First off, I haven't read all 4 pages in this thread, just the first post, sorry about that.

    I ABSOLUTELY support the release of the P2's final verilog. I know I'm in the minority here, but the P2 being open source or not is a deal breaker for me (I've been corrupted by RMS lol). If the P2 is not open-source, then I'll have to wait for the RISC-V project to finish (riscv.org), which will certainly be released much later than the P2.

    Now, open source does NOT mean GPL. The GPL isn't even designed for hardware, although some people use it as a hardware license. So long as parallax releases it in some form such that private individuals (not companies) can freely review, modify and publish the actual verilog, then I (and RMS and probably all the other people who bought the ridiculously overpriced novena laptop XD) will be the first to get my hands on the P2.

    Just my two cents.
  • Heater.Heater. Posts: 21,213
    edited 2015-07-10 - 19:27:30
    m00tykins,
    What? 
    Are your really saying that all the computers you use have their designs available and with open source style licences? 
    I really doubt that. How do you get anything done in that case? How did you make that post?
    The RISC-V project may not be "finished" but the sources and tools are available already to build your own working RISC-V machine. What is stopping you?
    The way this is going it's possible we can get a Lowrisc RISC-V machine in our hands before a PII. Lets's see.
    There is no reason the GPL or any other softwar licence cannot be used for hardware designs. Verilog and VHDL designs are source code after all. Just like C.
  • I wouldn't do that, until long after the silicon is in production and market established.

    Saying it is a deal breaker doesn't mean much. There is no deal in play.
    Do not taunt Happy Fun Ball! @opengeekorg ---> Be Excellent To One Another SKYPE = acuity_doug
    Parallax colors simplified: https://forums.parallax.com/discussion/123709/commented-graphics-demo-spin<br>

  • m00tykins,
    What? 
    Are your really saying that all the computers you use have their designs available and with open source style licences?

    Hi again Heater,

    Never said that, although I do have a macbook 2,1 with libreboot + linux on it, that's what I used to post that.
    There is no reason the GPL or any other softwar licence cannot be used for hardware designs. Verilog and VHDL designs are source code after all. Just like C.Now, open source does NOT mean GPL. The GPL isn't even designed for hardware, although some people use it as a hardware license.
  • Heater.Heater. Posts: 21,213
    edited 2015-07-11 - 21:11:15
    m00tykins,
    Great stuff.
    My question was really: Why are you saying that you would not use a P2 if it's design were not open sourced when you are clearly prepared to use other machines whose processors are not open sourced?
    I'm very keen on the RISC V idea as well and hope it is a success but I'm pretty sure a the Lowrisc will not be able to do what the P II was designed for, or even the P 1 for that mater.

    No doubt a RISC V can be made with Prop like features, but I'm not waiting on that.
    True enough, a design does not need to be GPL'ed to be open source. But then "open source" is not "Open Source" http://opensource.org/osd-annotated

  • Why wait? XMOS is there now with the XCORE-200:

    http://www.xmos.com/products/silicon/xcore-200

    It won't be long before they are in full production.

    BTW, Freescale has merged with NXP.


    You just had to get that in there ;-)

    Do you own stock in Freescale and/or NXP?
    In science there is no authority. There is only experiment.
    Life is unpredictable. Eat dessert first.
  • No one has contradicted me, though, about XMOS.

    NXP merging with Freescale is just an interesting development.
    Leon Heller
    G1HSM
  • sobakavasobakava Posts: 29
    edited 2015-09-28 - 12:11:11
    My point of view might be a little bit different. We have an electronics design & manufacturing company. For a project we have decided to go with Parallax Propeller 1 just because of it's video generation capabilities. I had to learn SPIN and assembler but with the support of this forum it was a reasonable learning curve.

    Anyway, we are manufacturing devices in series with Propeller-1. It's not hundreds of thousands, quantity is still limited in hundreds and we find the price of the Propeller 1's price reasonable, even if does not have 128KB RAM, 512MB FLASH, 12bit ADC etc. We just think it is very compact and straightforward solution to develop an embedded device with composite video output, graphics and text.

    The main concent of our current customer and potential new customers who has seen our existing product was the video quality. I mean the resolution and number of colors. There was a serious RAM bottleneck. I had to ask questions about this in the forum and learnt tips/tricks from really clever guys (potatohead) and even a customized compiler support came up. But the struggle remains. It significantly limits our sales and application areas. We are still looking for alternatives to generate higher resolution video signal with lowest possible jitter. When I first read about the P2, we were already in the production and I though; 'that's it. we will migrate to this chip whenever it becomes available.'

    Even though we are using FPGAs, CPLDs in our other projects, for this one I have never played with P2 core. Because compared to sub 10$ solutions (only CPU), it is impossible to put FPGA based design into our market. It is just expensive. FPGA is expensive, external memory IC is expensive 6 layer board instead of 2 is expensive. Assembly, handling, test, rework is expensive. Otherwise we wouldn't wait P2 core development at the beginning and we would design a video generator core and integrate it with any single core soft IP and DDR controller.

    Briefly, for those are planning to manufacture boards, FPGA is generally not an option. I think P2 on silicon is a promising device and I hope Parallax could find a way to release it.
  • tonyp12tonyp12 Posts: 1,938
    edited 2015-09-29 - 23:07:54
    P2 is not that revolutionary of a core that there will be a business to sell $200 FPGA boards.
    Or they go with off-the-shelf $15 1GHz CortexA9 and most things can be done in software at those speeds.
    http://www.mouser.com/ProductDetail/Texas-Instruments/AM4376BZDN100/?qs=sGAEpiMZZMvu0Nwh4cA1wfQzDn46SU1FW65jEV%2b0WcnNvJohCWWEUw==

    The 160Mhz Xtensa LX106 core that goes in the $3 ESP8266 WiFi chip is more revolutionary as it lets you create custom op-instructions.

    viterbi.gif?psid=1
  • So the Xtensa is basically like the RISC V concept.
  • tonyp12tonyp12 Posts: 1,938
    edited 2015-09-28 - 15:11:14
    They call it post-risc.
    http://ip.cadence.com/uploads/pdf/xtensa_LX.pdf

    The Tensilica Instruction Extension (TIE) language is used to describe new instructions, new registers and execution units, and new I/O ports that are then automatically added to the Xtensa LX processor.
    TIE is a Verilog-like language used to describe desired instruction mnemonics, operands, encoding and execution semantics.

  • Yep, sounds like the RISC V which also has some funky new languages and tools so that you don't have to write Verilog.
  • potatoheadpotatohead Posts: 9,712
    edited 2015-09-28 - 18:09:26
    Yeah, I saw that effort too. It's early, but interesting.

    I feel this chip is gonna make it personally. We are on a good design path. And it's mostly software too.

    Re: P1 with video output.

    Can you share something about your product and what along wirh other P1 attributes made that a compelling feature?

    For the future, are you still thinking composite? Just wondering because that is my first project when I get free to play on P2.


    Do not taunt Happy Fun Ball! @opengeekorg ---> Be Excellent To One Another SKYPE = acuity_doug
    Parallax colors simplified: https://forums.parallax.com/discussion/123709/commented-graphics-demo-spin<br>
  • For some applications, where cost is not the driving issue, FPGA products are becoming more reasonable. Note the $149.00 CVA9 board. I would love to take that board and combine a P2V processor with Mesanet's AnythingIO board drivers to create a killer CNC system. P1V is not up to the task, a P2V + some hard coded special functions would do nicely.

  • Hi Sobakava

    How many cogs do you need, if you take out video generation?

    I think the fpga landscape is changing a bit, particularly with devices like the max10 which has analog. Its interesting to me because I used some early Altera devices back in the 80s, and aren't really in a hurry to get back into fpgas (adds another "layer"), but can see several benefits now.

    I'm also interested in better composite
  • If you are willing to use two P1 chips, video can be significantly improved.
    Do not taunt Happy Fun Ball! @opengeekorg ---> Be Excellent To One Another SKYPE = acuity_doug
    Parallax colors simplified: https://forums.parallax.com/discussion/123709/commented-graphics-demo-spin<br>
  • jmgjmg Posts: 13,343
    "sobakava wrote:
    We just think it is very compact and straightforward solution to develop an embedded device with composite video output, graphics and text.
    Tubular wrote: »
    I'm also interested in better composite

    Composite in P2 is going to be interesting to follow.
    The P2 PLL's are less Chroma focused, but it has more RAM and the mathops just may be able to make up for PLL differences.
  • I'm not sure we need the math ops for a good signal, unless we want the advanced color management hot had.

    Do not taunt Happy Fun Ball! @opengeekorg ---> Be Excellent To One Another SKYPE = acuity_doug
    Parallax colors simplified: https://forums.parallax.com/discussion/123709/commented-graphics-demo-spin<br>
  • .

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  • Re: P1 with video output.

    Can you share something about your product and what along wirh other P1 attributes made that a compelling feature?

    For the future, are you still thinking composite? Just wondering because that is my first project when I get free to play on P2.
    Hi Sobakava

    How many cogs do you need, if you take out video generation?

    I think the fpga landscape is changing a bit, particularly with devices like the max10 which has analog. Its interesting to me because I used some early Altera devices back in the 80s, and aren't really in a hurry to get back into fpgas (adds another "layer"), but can see several benefits now.

    I'm also interested in better composite
    If you are willing to use two P1 chips, video can be significantly improved.

    Frankly I wouldn't use composite video but our product is an add-on to existing automotive video systems. It is some kind of information display system that is connected to existing analog LCD displays used to show rear-front-interior and side cameras in vehicles. These displays unfortunately does not have any other analog (SVideo, VGA) or digital inputs.

    Actually we are also manufacturing whole system in parallel for new vehicles ( a 800x480 24bit TFT touch display with triple composite video inputs, picture in picture feature etc) In these configuration we are using high resolution crystal crisp fancy graphics, animations etc)

    On the other hand, our customer has a market of thousands for vehicles with analog displays mounted. Two large displays in the dash is not feasable. but we couldn't abandon this market so we decided to design an alternative device which is compatible with existing system (composite video) By looking at the demos, we though Parallax Propeller 1 would be more than enough for this thing :)

    In the application we only have our main program (SPIN) and a COG that runs a small assembly routine to read and write data through a nibble wide bus. And of course video COG.

    Is there a demo of using multiple P1s to generate better video? Does it have higher resolution or bit depth?


    PS. We also evaluated to use a 32bit CPU with LCD controller and video encoder (http://www.analog.com/en/products/audio-video/video-encoders/analog-input-encoders/adv7393.html#product-evaluationkit) to generate composite video from RGB TTL signal but it was way costly and complex than P1.




  • Whew! I just read all this.

    It's a complex world.
  • jmgjmg Posts: 13,343
    sobakava wrote: »
    Frankly I wouldn't use composite video but our product is an add-on to existing automotive video systems. It is some kind of information display system that is connected to existing analog LCD displays used to show rear-front-interior and side cameras in vehicles.
    Does that need to support both NTSC and PAL, or does one give better results in automotive camera chips ?

    sobakava wrote: »
    Actually we are also manufacturing whole system in parallel for new vehicles ( a 800x480 24bit TFT touch display with triple composite video inputs, picture in picture feature etc) In these configuration we are using high resolution crystal crisp fancy graphics, animations etc)
    Does that also use P1, or something else ?
    sobakava wrote: »
    On the other hand, our customer has a market of thousands for vehicles with analog displays mounted. Two large displays in the dash is not feasable. but we couldn't abandon this market so we decided to design an alternative device which is compatible with existing system (composite video) By looking at the demos, we though Parallax Propeller 1 would be more than enough for this thing :)
    ....

    Is there a demo of using multiple P1s to generate better video? Does it have higher resolution or bit depth?
    I would expect a thread soon about Composite on P2, that could compare Single P1, Dual P1, and P2.
    This may need a PLL build P2, I think currently Chip builds for 50MHz XO.

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