Shop OBEX P1 Docs P2 Docs Learn Events
Radical P2 design changes - discussion only - Page 3 — Parallax Forums

Radical P2 design changes - discussion only

13»

Comments

  • Cluso99Cluso99 Posts: 18,066
    edited 2014-03-03 16:31
    cgracey wrote: »
    Absolutely. I'll get an update out before the USB/SERDES work commences.
    Chip,
    May I ask that you please add the one USB instruction before you release the fpga code?
    If it is not that simple, then maybe the following fpga release. I don't require pnut as I can hand code the longs.
    =======================================================================================================
    Reason: Add new pin-pair instruction for use with USB bit-banging receive (similar to GETP/GETNP)
            The S value (sub-instruction bits) "yyyyyyyy" would use the next available slot after CACHEX
    Thread: [URL="http://forums.parallax.com/showthread.php/151904-Here-is-the-update-from-the-Big-Change!!!?p=1222515&viewfull=1#post1222515"][COLOR=#4366fb]http://forums.parallax.com/showthrea...=1#post1222515[/COLOR][/URL]
    1111111 ZC L CCCC DDDDDDDDD xyyyyyyyy       GETXP   [#]D [WZ],[WC]  ' set flags for the pin-pair for usb bit-banging  
                                                                        '   D = PINx (0..127), PINy := PINx XOR $1 (it's complementary pin-pair)
                                                                        '   C = C XOR PINx via WC
                                                                        '   Z = !(PINx OR PINy) via WZ (ie ZERO if both PINx and PINy are both ZERO == SE0 in USB)
    PINx and PINy are a pair of pins. If PINx is even then PINy := PINx + 1 else if PINx is odd then PINy := PINx - 1
    The allowance for the PINx/PINy pair to be reversed is for USB LS & HS where J/K are effectively swapped between D-/D+.
    WZ & WC would normally be used.
    =======================================================================================================
    
  • cgraceycgracey Posts: 14,133
    edited 2014-03-03 16:34
    Cluso99 wrote: »
    Chip,
    May I ask that you please add the one USB instruction before you release the fpga code?
    =======================================================================================================
    Reason: Add new pin-pair instruction for use with USB bit-banging receive (similar to GETP/GETNP)
            The S value (sub-instruction bits) "yyyyyyyy" would use the next available slot after CACHEX
    Thread: [URL="http://forums.parallax.com/showthread.php/151904-Here-is-the-update-from-the-Big-Change!!!?p=1222515&viewfull=1#post1222515"][COLOR=#4366fb]http://forums.parallax.com/showthrea...=1#post1222515[/COLOR][/URL]
    1111111 ZC L CCCC DDDDDDDDD xyyyyyyyy       GETXP   [#]D [WZ],[WC]  ' set flags for the pin-pair for usb bit-banging  
                                                                        '   D = PINx (0..127), PINy := PINx XOR $1 (it's complementary pin-pair)
                                                                        '   C = C XOR PINx via WC
                                                                        '   Z = !(PINx OR PINy) via WZ (ie ZERO if both PINx and PINy are both ZERO == SE0 in USB)
    PINx and PINy are a pair of pins. If PINx is even then PINy := PINx + 1 else if PINx is odd then PINy := PINx - 1
    The allowance for the PINx/PINy pair to be reversed is for USB LS & HS where J/K are effectively swapped between D-/D+.
    WZ & WC would normally be used.
    =======================================================================================================
    


    Yes, I've been really meaning to get to that. It should be no problem.

    Today, I got the register-to-INDA/B done and the static register remapping. I'm just mulling the final approach on the task save/restore now.
  • jmgjmg Posts: 15,140
    edited 2014-03-03 16:40
    Cluso99 wrote: »
    Chip,
    May I ask that you please add the one USB instruction before you release the fpga code?

    Does this pin-pair read instruction need a complementary version for output to pins ?
  • SapiehaSapieha Posts: 2,964
    edited 2014-03-03 16:53
    Hi Cluso.

    BUT -- don't You need any SETXP instruction to send on that pair?
    Cluso99 wrote: »
    Chip,
    May I ask that you please add the one USB instruction before you release the fpga code?
    If it is not that simple, then maybe the following fpga release. I don't require pnut as I can hand code the longs.
    =======================================================================================================
    Reason: Add new pin-pair instruction for use with USB bit-banging receive (similar to GETP/GETNP)
            The S value (sub-instruction bits) "yyyyyyyy" would use the next available slot after CACHEX
    Thread: [URL="http://forums.parallax.com/showthread.php/151904-Here-is-the-update-from-the-Big-Change!!!?p=1222515&viewfull=1#post1222515"][COLOR=#4366fb]http://forums.parallax.com/showthrea...=1#post1222515[/COLOR][/URL]
    1111111 ZC L CCCC DDDDDDDDD xyyyyyyyy       GETXP   [#]D [WZ],[WC]  ' set flags for the pin-pair for usb bit-banging  
                                                                        '   D = PINx (0..127), PINy := PINx XOR $1 (it's complementary pin-pair)
                                                                        '   C = C XOR PINx via WC
                                                                        '   Z = !(PINx OR PINy) via WZ (ie ZERO if both PINx and PINy are both ZERO == SE0 in USB)
    PINx and PINy are a pair of pins. If PINx is even then PINy := PINx + 1 else if PINx is odd then PINy := PINx - 1
    The allowance for the PINx/PINy pair to be reversed is for USB LS & HS where J/K are effectively swapped between D-/D+.
    WZ & WC would normally be used.
    =======================================================================================================
    
  • Cluso99Cluso99 Posts: 18,066
    edited 2014-03-03 18:01
    jmg wrote: »
    Does this pin-pair read instruction need a complementary version for output to pins ?
    Sapieha wrote: »
    Hi Cluso.

    BUT -- don't You need any SETXP instruction to send on that pair?
    I had proposed a method to change the pin instructions such as SETB etc to use the WC & WZ to be able to set pin pairs.

    However, from what I understand we can output complementary pairs using the builtin PIN modes. Alternately we can use XOR with PORTx to achieve this. The transmit side is much easier. If I find I need something like that later, I will ask. Currently I am more concerned with getting the read done, followed by the simple CRC bit routine.

    With these under my belt, I can proceed. While I do this, SERDES can happen :) SEDES will take some time.
Sign In or Register to comment.