1Mbit Versatile SPI/8-bit Parallel Bus SRAM

MacTuxLinMacTuxLin Posts: 798
http://www.vlsi.fi/?id=194

A ready peripheral for Prop-II ? Go get your samples today!

Kenichi
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Comments

  • 46 Comments sorted by Date Added Votes
  • rwgast_logicdesignrwgast_logicdesign Posts: 1,464
    edited September 2012 Vote Up0Vote Down
    How is this different from the new quad speed microchip spi sram chips? I have 8 sitting here to make a round megabyte I plan on using in parallel with a prop just the code needs chaning but the pinout is the same same the 32KB microchip srams people were stacking 8 of not to long ago. Can you imagine a a full meg of zippy external sram!

    This can read and write 4 bits in parallel? Thats acually kind of cool I wonder how that compares to reading writing 4 or 8 chips in parallel.. it says there 36mhz mc's ram is only 20 and vga is 25mhz so this could be a nice video buffer id assume! Man I seriously just ordered a megabyte of this microchip sram!
  • MacTuxLinMacTuxLin Posts: 798
    edited September 2012 Vote Up0Vote Down
    Same here, I have about 20 pcs of that same Microchip SRAM that you have. I guess for one, this 1Mbit SRAM already save you your precious pcb property space. As for 4 bits, I guess so but with 8-bit parallel to Prop-II, it simply becomes a must-have companion to Prop-II, isn't it? Anyway, I've already placed order for samples....

    Kenichi
  • jmgjmg Posts: 11,785
    edited September 2012 Vote Up0Vote Down
    MacTuxLin wrote: »
    A ready peripheral for Prop-II ? Go get your samples today!

    Interesting, and along the lines of the QuadSPI part from Microchip.
    The VS23S010 strangely has a slower READ speed, than Write speed ?
    Commands look to always be singe-bit mode, so it always needs 32 clocks to Set Address.
    Pattern mode is close to Video, but not quite - it seems to hint at dual port but not clear what application Pattern mode was build for ?

    The outer page calls the VS23S010 a "Easy to use accessory devices for audio applications",and an inner page says "This feature significantly reduces the computing requirement of a microcontroller for applications that require periodic output from the memory, such as a video frame buffer." - but they seem to have no Video blanking, or flyback-pause on Scan.

    An 8 bit fast Video read, via a RAM-Palette, would have been interesting.
  • rwgast_logicdesignrwgast_logicdesign Posts: 1,464
    edited September 2012 Vote Up0Vote Down
    @maxtux why is this so great for the prop2 it has a nice dram interface already, why not try it on the prop

    @jmg im sorta confused im sure u can clear this up, microchip has the quad spi mode but its former chip did not. both mc parts are 20mhz so exactly how are the new chips faster if limitedd to the same bandwith? do you think an 8 or even better 32 chip array in parallel is fast enough for video and decent xmm speeds?
  • jmgjmg Posts: 11,785
    edited September 2012 Vote Up0Vote Down
    @jmg im sorta confused im sure u can clear this up, microchip has the quad spi mode but its former chip did not. both mc parts are 20mhz so exactly how are the new chips faster if limitedd to the same bandwith? do you think an 8 or even better 32 chip array in parallel is fast enough for video and decent xmm speeds?

    The CLK speeds are nominally the same, but the new parts can enter Quad mode during the address phase, and so load an Address in 8 clocks, instead of 32.
    Data pumping also occurs at 4 bits per clock, so the Data bandwidth is 4x faster.

    Yes, more chips gives higher bandwidths, but at some stage you need to decide on Pin-Usage.


    The VLSI part has some higher MHz rates, but always runs the ADR preamble in x1 mode, so random access of small data will be slower than MicroChip.

    VLSI must have some large customer with a specific need for that device, as it is a little unusual.
  • rwgast_logicdesignrwgast_logicdesign Posts: 1,464
    edited September 2012 Vote Up0Vote Down
    well lets say theoretically pins arent an issue. could you get data fast enough for a vga buffer by paralleling either of these chips? ive seen a drhystone for xmm on the 32k chips in paralell if i divide that by 4 will that be my new rough drystone results using the new mc parts? which of these chips make for a better prop solution?

    i guess my thinking is if the mc parts are 4x faster than pulling the data and buffering it should drive vga that would effectively be like 80mhz minus prop overhead
  • MacTuxLinMacTuxLin Posts: 798
    edited September 2012 Vote Up0Vote Down
    @maxtux why is this so great for the prop2 it has a nice dram interface already, why not try it on the prop

    Was thinking more about those many Prop-II pins.

    Yeah, I'll sure try that out in quad SPI mode with Prop when I get the the samples :smile:

    Kenichi
  • jmgjmg Posts: 11,785
    edited September 2012 Vote Up0Vote Down
    could you get data fast enough for a vga buffer...

    Depends what you mean by VGA.
    Lowest std VGA clock speed is 25+MHz, and there are 32MHz and 40MHz rates too, up to 150MHz+.
    So you might push a MicroChip part to 25MHz, but if you wanted 40Mhz then a 2:1 MUX would be needed, which somewhat negates the appeal of SPI devices.

    The VLSI part is vague in vital areas. If you CAN use SPI to write to any location while Pattern reads, then it is Dual-Port, and that solves one problem with Video Buffering.
    MCLK is 48MHz, but Pixel rate is MCLK/2/4/8, so you can do 24MHz Nibbles max, and then they suggest some jitter in starting, which is NOT good for Video : "5 − 7 MCLK cycles" ?!
    It seems their customer is Audio, not Video, so this is unproven ground.
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 21,990
    edited September 2012 Vote Up0Vote Down
    I requested some samples of this chip. As part of the request, I mentioned that I might like to use it as a VGA frame buffer. This is part of the email response I got from VLSI without even asking questions or requesting technical assistance:
    Since the second 64K in the RAM cannot be used for the pattern generator
    in this chip version, there's quite a hard limit for the frame buffer
    size. All depends on how simple or complex your logic will be. If you're
    intending to use an FPGA or such to create the VGA timings, the
    situation is more flexible for you. But if you intend to generate the
    whole VGA frame mainly using the VS23S010, might I offer you an opinion,
    as to how I would myself start with the process. Note that generating an
    NTSC or PAL frame is easier than generating a VGA frame with the
    VS23S010, because the number of lines in a television frame can be as
    low as 262.

    I'd use the 350 lines per frame, 70 Hz framerate spec, because that's
    the smallest frame any VGA display is required to accept. This frame
    requires 449 lines to be sent, each 31.77 microseconds. There's a
    convenient round number: if we use 144 bytes per line, we get 144
    bytes/line *449 lines = 64656 bytes per frame, which is nicely within
    the first 64K.

    At four bits per pixel, we get 144*8/4 = 288 pixels per line, out of
    which 230 pixels (=288*64/80) will be visible.

    At 31.77 microseconds per line, for 288 pixels, the pixel time is
    0.1103125 microseconds and the pixel rate will be 9.065 MHz. Probably
    the best clock rate for the VS23S010 would be four times the pixel rate:
    36.26 MHz. Since the monitor will be able to adjust somewhat, anything
    reasonably close to that frequency would be usable.

    This would give you a viewable resolution of 230*350 with very simple
    electronics. If I were to do it, my first prototype would use 1 bit for
    VSYNC, 1 bit for HSYNC, 1 bit for RED and 1 bit for GREEN. For text
    display, I'd tie the BLUE to GREEN, or maybe to 1 for a constant blue
    background. I'd have 4 color selections per pixel. Later I'd add some
    logic to generate HSYNC and VSYNC from two or three of the 16 "colors"
    and map the rest into the RED, GREEN and BLUE inputs of the monitor,
    using 2-3 bit resistor "DACs" to have more freedom in the color selection.

    I'd also consider to make a prototype with two VS23S010's, either to
    double the horizontal resolution (emulate a later generation VS23S010
    which should be able to use the whole 128Kbyte memory for the
    framebuffer), or to add four more bits of the color to expand the
    colorspace. Another direction would be to add some logic to the PCB,
    adding a CPLD or FPGA device to handle the VGA timing would make it
    possible to have a 320*400, 16 bit mode or even a 320*200, 256 color mode.

    Now that's what I call service! If only more chip companies were this responsive.

    -Phil
    “Perfection is achieved not when there is nothing more to add, but when there is nothing left to take away. -Antoine de Saint-Exupery
  • jmgjmg Posts: 11,785
    edited September 2012 Vote Up0Vote Down
    Now that's what I call service! If only more chip companies were this responsive.

    Yes, impressive response, but rather confirms they have not had Video on their Radar, and still no mention of if it is Dual port.
    The suggestion of using the Streamed Data for Sync, also side-steps the start-jitter issue in their spec, but at considerable wasted RAM cost.
  • MacTuxLinMacTuxLin Posts: 798
    edited September 2012 Vote Up0Vote Down
    My free samples just arrived! There goes my weekend ..... sorry wife :lol:

    VLSI VS23S010A Samples.jpg
    653 x 368 - 62K

    Kenichi
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 21,990
    edited October 2012 Vote Up0Vote Down
    My samples arrived a week or so ago. The bill from FedEx for shipping the "free" samples from Finland arrived last Thursday: $224!!!!! If you order these samples, DO NOT provide them with a shipper account number. (What was I thinking?) Anyway, I called FedEx to complain about the charge. They said they couldn't reduce it but would be happy to bill it back to the shipper. When I asked if they were going to mail me an adjustment, the representative said, "No. Just tear up the invoice."

    Eexxcellent! [in my best Mr. Burns voice]

    -Phil
    “Perfection is achieved not when there is nothing more to add, but when there is nothing left to take away. -Antoine de Saint-Exupery
  • MacTuxLinMacTuxLin Posts: 798
    edited October 2012 Vote Up0Vote Down
    @Phil, that was a frightening experience! I didn't enter anything in the shipping fields so its automatically paid by VLSI.

    Kenichi
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 21,990
    edited October 2012 Vote Up0Vote Down
    The saga continues, unfortunately. I just got an email from VLSI expressing shock -- shock! -- that I would try to charge the shipping back to them. In response I explained that I felt that by shipping the individual samples in a cardboard carton instead of a much less-expensive courier envelope -- directly from Finland, no less -- and using FedEx's most expensive shipping class, they had done me a disservice and need to take responsibility for it. I suggested further that it would make much more sense to bulk-ship parts to a U.S. distribution point for sampling, rather than sending each sample directly from Finland.

    We'll see what transpires. Needless to say, I'm probably on their s---list for any further technical assistance. Oh, well.

    -Phil
    “Perfection is achieved not when there is nothing more to add, but when there is nothing left to take away. -Antoine de Saint-Exupery
  • jazzedjazzed Posts: 11,803
    edited October 2012 Vote Up0Vote Down
    Free puppies anyone? :)
  • mindrobotsmindrobots Posts: 6,496
    edited October 2012 Vote Up0Vote Down
    Puppies are like employees, regardless of the up-front costs, they have a very high "loaded cost"!
    MOV OUTA, PEACE <div>Rick </div><div>"I've stopped using programming languages with Garbage Collection, they keep deleting my source code!!"</div>
  • Oldbitcollector (Jeff)Oldbitcollector (Jeff) Posts: 8,084
    edited October 2012 Vote Up0Vote Down
    Waiting on a batch of SOIC adapters I ordered so I can play with these..

    No.. No puppies please..

    Jeff
    <br>
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 21,990
    edited October 2012 Vote Up0Vote Down
    All's well that ends well, I guess. 'Just got this brief email from VLSI: "Thanks for your detailed description! Do not worry about FedEx costs, We will pay it."

    -Phil
    “Perfection is achieved not when there is nothing more to add, but when there is nothing left to take away. -Antoine de Saint-Exupery
  • LoopyBytelooseLoopyByteloose Posts: 12,537
    edited October 2012 Vote Up0Vote Down
    My samples arrived a week or so ago. The bill from FedEx for shipping the "free" samples from Finland arrived last Thursday: $224!!!!! If you order these samples, DO NOT provide them with a shipper account number. (What was I thinking?) Anyway, I called FedEx to complain about the charge. They said they couldn't reduce it but would be happy to bill it back to the shipper. When I asked if they were going to mail me an adjustment, the representative said, "No. Just tear up the invoice."

    Eexxcellent! [in my best Mr. Burns voice]

    -Phil

    I guess some will now understand why I am wary of asking for free samples in Taiwan. They do ask for at least a major credit card to cover shipping.
    Hwang Xian Shen, Puddleby-on-the-Marsh.
    All things considered, I can live and thrive without Microsoft products. LINUX is just fine.
  • Oldbitcollector (Jeff)Oldbitcollector (Jeff) Posts: 8,084
    edited November 2012 Vote Up0Vote Down
    Finally got my SOIC adapters in... Probably should have ordered more than I did because it takes so long from the supplier..

    Anyone playing with these yet? I'm getting ready to solder one up.

    Jeff
    <br>
  • MacTuxLinMacTuxLin Posts: 798
    edited November 2012 Vote Up0Vote Down
    Same here. I've mounted to the adapter & placed on my PPDB together with FM24CL64 (FRAM) & 23K256. Was thinking of playing some benchmarking but other current projects are just way more interesting at the moment :lol:

    Kenichi
  • panupanu Posts: 10
    edited February 2016 Vote Up0Vote Down
    Hi all, this is Panu from VLSI! (the one who wrote the lengthy email response to Phil Pilgrim)

    It's been a while, but I'd just like to mention that we're finally in production with the VS23S010D-L, which is focused on PAL/NTSC video generation (though I have made a simple VGA demo too). I wrote a lengthy article about it in the Uzebox forum, at http://uzebox.org/forums/viewtopic.php?f=1&t=1754#p17111 .

    IMG_0536_CROP3.JPG
    8-bit Palette Test

    What we now have is the VS23S010D-L chip getting in production, that has an integrated video DAC, 128 kilobytes of SRAM, any amount of which can be assigned to be video memory, xtal oscillator, internal PLL clock multiplexer, digital PAL/NTSC modulator and the necessary counters and logic to get bits from the SRAM and into the modulator. It's a bit more fancy that what I first conceived, but much more flexible. You can set the start address of pixel data for each line separately so you can duplicate lines and create horizontal/vertical scrolling effects. And you can have many different prototypes for a line - those are what forms the sync, burst and background areas. You can select the number of bits you want for the color components, from 1 to 20 bits per pixel. Obviously you can set the length of lines, number of lines and the resolution. There's even a block copy engine.

    VS23S010 Forum at VLSI
    VS23S010 Product Page

    --

    I have a slightly red face now when I read about the awful shipping cost experience described here. It's like a Homer Simpson "Doh" moment... I'm really sorry about it - I can just try to offer a point of view that might explain something.. We're talking about numbered chips here. That's the first of the first of the first units of a new IC that we get. The cost is something like USD100K or USD200K (depending on which costs you calculate in) and we get something like 50 to 80 of them. That's like 2000 dollars each. So if the sample order is accompanied with a shipper account ID, we happily take it as a courtesy, signaling that the receiver appreciates the samples enough to pay for the delivery. We'd probably not even give it another thought. And these chips, they've traveled across the world, each spent hours in the laboratory with engineers testing them by hand - of course we use the most secure and most expensive transport. For us it's a given. But of course, from your point of view it's different - you'd perhaps not even realize how precious these very early samples are. But we send them out happily - an early adopter gives the most valuable feedback for a new product.

    So, I hope you guys can forgive us for this blunder. The guy at VLSI receiving the shipping bill back probably just thought that the chips had cost USD10K so why is he complaining about a couple hundred and thus had no idea what had just transpired and probably more than anything just was annoyed by having to do the paperwork. Well, that's life. I am sorry about it.

    Well, at least finally..
    All's well that ends well, I guess. 'Just got this brief email from VLSI: "Thanks for your detailed description! Do not worry about FedEx costs, We will pay it."
    Hehehe... knowing the guy who processed the shipping and knowing the guy who wrote this - it just puts a smile on my face. Oh, the happy days at the office.


    Ok, so, this was just to let you know, that the awesome new composite video controller has arrived - in year 2016 no less. If only we'd had this in 1986! :) And now we have thousands of them so no worries!


    -Panu
    535 x 338 - 84K
  • panu wrote: »
    Hi all, this is Panu from VLSI! (the one who wrote the lengthy email response to Phil Pilgrim)

    It's been a while, but I'd just like to mention that we're finally in production with the VS23S010D-L, which is focused on PAL/NTSC video generation (though I have made a simple VGA demo too).

    Wow, this is significant- I think this needs a new thread...
    What price are these parts, and who stocks (will stock) them ?
  • panu wrote: »
    What we now have is the VS23S010D-L chip in production, that has an integrated video DAC, 128 kilobytes of SRAM, any amount of which can be assigned to be video memory, xtal oscillator, internal PLL clock multiplexer, digital PAL/NTSC modulator and the necessary counters and logic to get bits from the SRAM and into the modulator.

    You mention VS23S010D-L, which sounds like a Rev D, as the ~ 1 year older Web site mentions only VS23S010C ?

    Data is VS23S010C, also 1 year old, and prelim, do you have confirmed MHz figures, for Vcc choices ? - and new data sheets ?


  • Hi!
    You mention VS23S010D-L, which sounds like a Rev D, as the ~ 1 year older Web site mentions only VS23S010C ?
    Yeah, with rev. C they still felt they want to fix something and the production version is now 'D'.
    Data is VS23S010C, also 1 year old, and prelim, do you have confirmed MHz figures, for Vcc choices ? - and new data sheets ?
    Those figures come from the test program, e.g. we run qualification in parallel (1000 hours, 125 degrees C) and then based on that qualification data we try to find the error mechanisms and set the test rejection limits for the production and those rejection limits, adjusted by chip aging profile, are what gets printed in the datasheet. I'm not sure how near the end of this process we are. It's not my project, actually, those guys at quality@vlsi.fi are a different breed of engineers... they take their time before they drop the "Preliminary" from the datasheet.

    Do you have a specific question or a specific operation point in mind; I could ask the engineers about it.
  • panu wrote: »
    Do you have a specific question or a specific operation point in mind; I could ask the engineers about it.

    The front page of the Jan 2015 data says
    – Up to 36 MHz for SPI
    – 15 MHz for 8-bit parallel interface

    but further in, it gives other info

    SPI clock frequency (read)
    12 MHz VDD = 1.5 V
    18 MHz VDD = 1.8 V
    33 MHz VDD = 3.0 V
    36 MHz ( @ 3.3 ?)

    SPI clock frequency (write)
    27 MHz VDD = 1.5 V
    27 MHz VDD = 1.8 V
    48 MHz VDD = 3.0 V
    48 MHz

    Clock frequency F XRD _ XWR
    6 MHz VDD = 1.5 V
    9 MHz VDD = 1.8 V
    15 MHz VDD = 3.0 V
    15 MHz

    Clock frequency F XRD _ XWR
    24 MHz VDD = 1.5 V
    24 MHz VDD = 1.8 V
    30 MHz VDD = 3.0 V
    30 MHz

    Why is read speed lower than write, is that allowing some Tsu on the host size ?
    If you stream as in Video-Quad mode, there is no Tsu, so does read MHz then become the same as write MHz ?
    A Prop1 can generate a read CLK of 40MHz or 48MHz (80 MHz or 96MHz SysCLK), plus lower, so those are obvious targets.

    Package are shown as SO8 and TQFP48.
    Are any other packages planned - eg TSSOP8 ?

    There is also 4 x Analog mapping tagged :
    1) Not connected in first prototypes, reserved for use in future Multi-IC VS23S010C-Ls.

    Do those multi-ic versions still exist, and with what part codes ?
  • Hi!

    Some general answers now, some answers after I've asked the chip engineer.

    - Reading is slower than writing, because there must be time for the data to arrive from the memory array to the shift register after the last bit of the address, once every 32 bits. When writing, bits can be happily banged to the shifter and internally there's plenty of time to write the data into the memory array.

    - When video mode is active, some parts of the chip (internally) switch from being asynchronous to synchronous with the video clock, changing some timings.

    - I can't quite put my finger on what you mean by "Video-Quad mode", but your timing questions seem very interesting. Can you rephrase those questions, pointing to specific pages and figures on the datasheet which are unclear.

    - No multi-ic currently exists. Perhaps we ought to take that away from the datasheet so that people will not wait for it...

  • panu wrote: »
    - Reading is slower than writing, because there must be time for the data to arrive from the memory array to the shift register after the last bit of the address, once every 32 bits. When writing, bits can be happily banged to the shifter and internally there's plenty of time to write the data into the memory array.
    OK
    panu wrote: »
    - I can't quite put my finger on what you mean by "Video-Quad mode", but your timing questions seem very interesting. Can you rephrase those questions, pointing to specific pages and figures on the datasheet which are unclear.
    When used on 4 bit VGA, you would play back in Quad Read, at the Pixel clock rate.

    There is mention of modes like StFastWV, but it is not clear if that is only for 48 pin part, and only Composite ?

    ie can 8 pin Memory use some scan-playback, or must the host update start-address every line (that looks to cost 16 SysCLKs per scan line ?)
    panu wrote: »
    - No multi-ic currently exists. Perhaps we ought to take that away from the datasheet so that people will not wait for it...
    :) Yes, if it is not on the road map, best remove it untl it is.


    The Table on page 37 suggests all those modes are supported ? - but the Fig 26 only has Chroma YUV pathways ?
  • Has anyone gotten a price for this chip ? Even an estimate ?

    Bean
  • panupanu Posts: 10
    edited February 2016 Vote Up0Vote Down
    The budgetary price for VS23S010D-L (48 pin LQFP package, with video out) for 1000 pieces is USD 1.90 each.
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