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Phillip Y.
10-08-2006, 02:33 AM
I would like to know a bit more about the current output from a pin connected direct without a current limiting resistor,
To a 1.7v LED connected to 0v and then·to +3.3v .
Same with a 0.6v Diode ?
Same but short circuit to 0v and then 3.3v ?

What·is the·limit·to the total current using multiple outputs ,
is this a thermal limit for the chip or is it a limit of the 2 Vdd (3.3v)·, 2 Vss (0v)·pins ?

If a balance of 3.3v and 0v loads was used could this be increased, as not all the current would flow though Vdd and Vss pins ?

I understand that the pins have internal protection diodes to Vdd and Vss , ( regardless of the use as an input or output )
and that if you connect a pin to·anything higher than 3.3 volts·that·current coming in from that pin starts to raise the chip voltage higher than 3.3v in effect replacing the power coming in from the Vdd·pins.

What happens when a pin is pulled below 0v?

Can the chip "latch up" ?

Paul Baker
10-08-2006, 02:52 AM
First off I do not suggest clamping an output pin to a low impedence circuit presenting a fixed voltage, some specific chips implement current limiting output cicuitry but this is rarely for general microcontrollers.

As the remainder of your questions, I will be honest: we don't know. I would be able to get you the designed in parameters when I see Chip next, however we have not performed characterization tests on the actual Propeller chips yet. This is one of my main responsibilities in the immeadiate sense. I am currently designing a test jig to measure the required parameters, and I would welcome some input and feedback from people in the industry on what they are looking for as far as tested parameters. So I would be happy to continue this conversation in PM (or email), and would be willing to provide you with interim results as I proceed before they are codified into a Propeller Datasheet.

I likewise invite all industry people interested in using the Propeller for thier designs, both active and "lurking" in this forum to contact me via PM (or email)·and we will work together on making sure the important parameters are characterized for this chip.

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Paul Baker (mailto:pbaker@parallax.com)
Propeller Applications Engineer
[/url][url=http://www.parallax.com] (http://www.parallax.com)
Parallax, Inc. (http://www.parallax.com)

Post Edited (Paul Baker (Parallax)) : 10/7/2006 7:57:12 PM GMT

Tracy Allen
10-08-2006, 12:59 PM
Hi Paul,

I'd like to see the kind of data that Phillip brought up, also ESD hardiness. Human body model and whatnot.

Here is some preliminary data I had posted in the beta forum about capabilities of the (+) side protection diode. I did not succeed in driving it into latchup, (sample size=1).

http://forums.parallax.com/attachment.php?attachmentid=40944

The current rises exponentially as expected and is significant when the input voltage exceeds 0.5 volt above Vdd. I think Chip told us that the protection diodes, and also the source and sink capabilities are symmetric by design.

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Tracy Allen
www.emesystems.com (http://www.emesystems.com)

Post Edited (Tracy Allen) : 10/8/2006 6:24:00 AM GMT

Paul Baker
10-08-2006, 01:13 PM
Thanks for the input Tracy, ESD (HBM) is being performed as I speak, so are environmentals and storage life burn in. Dynamic burn in will be done shortly.

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Paul Baker (mailto:pbaker@parallax.com)
Propeller Applications Engineer
[/url][url=http://www.parallax.com] (http://www.parallax.com)
Parallax, Inc. (http://www.parallax.com)

Post Edited (Paul Baker (Parallax)) : 10/8/2006 6:18:12 AM GMT

Tracy Allen
10-08-2006, 01:28 PM
Paul,

For industrial users, the performance at temperature extremes will be important. As I've mentioned to Chip, I have an environmental chamber for temperature testing from -60 to +125 degrees Celsius, that I use with the Stamp and my data loggers. Maybe we could work something out to test the Prop, as I don't know if you have equipment there for sub-zero temperatures.

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Tracy Allen
www.emesystems.com (http://www.emesystems.com)

Phil Pilgrim (PhiPi)
10-08-2006, 02:26 PM
Paul,

Also, please don't forget to include timing characteristics:
Reset timing from: power-on, brownout, and /RST.
Input setup and hold times relative to system clock.
Output delay times relative to system clock.
I/O timing relative to instruction decoding and execution.
Change on pin to end of WAITPEQ or WAITPNE.
Count = target to end of WAITCNT.
Internal oscillator frequency variation over temperature.


Oh, heck, you've seen microcontroller datasheets. You know the stuff I mean! http://forums.parallax.com/images/smilies/smile.gif

Thanks,
Phil

Phillip Y.
10-08-2006, 03:52 PM
The first 1/2 of what asked for is based on my experience with cmos logic gates 74C00 CD4001, etc.
The output current has an inherent current limit and can be connected directly to an led or even shorted·to 0v.
However, since cmos is symmetrical, it can be shorted to the + supply instead of 0v.
The·current was usually 1 to 30ma. (this does not involve the protection diodes) .

I have attached a data sheet for CD4001BC , page 6 shows curves·for source and sink currents for 5,10,15v.

This kind of information would usually be provided by the foundry·based on·the output transistor size and process.

Paul Baker
10-09-2006, 01:09 AM
Thanks for the offer Tracy, since we are going into the chip business we may end up getting our own chamber, but I will keep your offer in mind.

Phil (Pilgrim), I know exactly what you mean, but thanks for providing the AC timings you are interested in.

Phillip Y., I see what you are refering to, those graphs will be produced under the stress testing so I will see if they are self limiting. However, at this stage I do not believe they are, high speed CMOS must be able to source and sink large amounts of current to overcome the load capacitance in an acceptable time frame.

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Paul Baker (mailto:pbaker@parallax.com)
Propeller Applications Engineer
[/url][url=http://www.parallax.com] (http://www.parallax.com)
Parallax, Inc. (http://www.parallax.com)

Tracy Allen
10-09-2006, 02:11 AM
Current limiting is pretty much a characteristic of the n- and p- MOS transistor. At light loads, it will have a small signal output resistance that is fairly linear. In the SX chip that is around 40 ohms. as if a 40 ohm resistor is in series internally with the output. The voltage at the output pin decreases as the load is heavier, and bends around to become a current source, so the short circuit current might be 50 milliamps. Varies with supply voltage. The bigger the geometry, the larger the limit current and the lower the small signal output resistance.

Usually the testing is done with a pulsatile output, and data taken as a function of varying load. It is pulsatile in order to limit the temperature rise and to push it up to levels that might burn out the transistor or the bond wire if left in steady state. This figures quantitatively in driving capacitive loads, and the testing can alternatively be done with a capacitive load subject to pulses. The initial slope of dVc/dt is equal to Isc/C, where Isc is the short circuit current. Then as the capacitor charges up toward 3.3 volts Vdd, the rate is determined by the small signal output resistance, dVc/dt = (Vdd - Vc) / (Ro * C). Testing with a capacitor is nice, because you can extract the entire I-V curve from one experiment without having to mess with a varying load.

The issue of what current over what time span will cause failure, is a separate issue.

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Tracy Allen
www.emesystems.com (http://www.emesystems.com)

Post Edited (Tracy Allen) : 10/8/2006 7:22:36 PM GMT

Paul Baker
10-09-2006, 02:21 AM
Thanks for the clarification.

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Paul Baker (mailto:pbaker@parallax.com)
Propeller Applications Engineer
[/url][url=http://www.parallax.com] (http://www.parallax.com)
Parallax, Inc. (http://www.parallax.com)

Paul Baker
10-09-2006, 08:40 AM
Its a smack my head moment, of course the output would be self-limiting due to the saturation curve, and the Early Effect appears as a resistance in the region. However, this does not mean it's ok to steady state drive an LED off the output. The heat due to the extra current flow can lead to the breakdown of the MOSFET, or at least it's early demise.

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Paul Baker (mailto:pbaker@parallax.com)
Propeller Applications Engineer
[/url][url=http://www.parallax.com] (http://www.parallax.com)
Parallax, Inc. (http://www.parallax.com)

Paul Baker
10-28-2006, 04:26 AM
OK here's a preliminary datum·Isc= 50mA steady state, 21 hours continuous 6°F case over ambient for PDIP 40, sample size 1.

In lay terms: initial results show a single I/O pin may be shorted indefinitely with minimal package heating for the PDIP variant of the Propeller. This is atypical for most microcontrollers. I will be increasing the sample set shortly, though I will be reducing the steady state time from 21 hours to 10 minutes before·reading the case temperature.·But do not use this information for designs until I have a larger sample set, if all fall within 50mA, the preliminary results will be valid.

·

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Paul Baker (mailto:pbaker@parallax.com)
Propeller Applications Engineer
[/url][url=http://www.parallax.com] (http://www.parallax.com)
Parallax, Inc. (http://www.parallax.com)

Phillip Y.
10-28-2006, 09:48 AM
Wow that is higher than I expected, but that is probably needed to·have a 20MHZ bandwidth for high speed I/O.

50ma x 3.3v = 0.165W for each short, max of 32 outputs = 1.6A , x3.3 = 5.28W, the bonding wires to 0v or 3.3V·would probably blow like a fuse.

6 shorts = 0.3A , x 3.3 = 0.99W probably a practical limit for the 40pin dip version.

Not that I would be doing this but it gives me some ideas for a switching power supply to generate auxiliary voltages,
like +/- 12v at 1MA, the inductor or capacitor·could be driven directly by some I/O pins.

I assume that this is a short to 0V. What about to 3.3V ?

Paul Baker
10-28-2006, 10:06 AM
Yes it is a short to 0V. I can test the 3.3V short as well, its a balanced drive output so it should be the same, but I will verify it. Testing the total current capabilities of the Propeller will be my next test and I expect to destroy my entire sample set doing it. The tests had to be set aside today to verify the prototype for my first Propeller product, but I will be returning to them next week.

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Paul Baker (mailto:pbaker@parallax.com)
Propeller Applications Engineer
[/url][url=http://www.parallax.com] (http://www.parallax.com)
Parallax, Inc. (http://www.parallax.com)

Phillip Y.
10-28-2006, 10:22 AM
For the destructive testing you could first use chips that had other problems, just like the automakers crash testing a new car design.

Paul Baker
10-28-2006, 10:24 AM
I may postpone the test until Ive used them for other non-destructive tests such as Theta-JA so Im not wastefull. Though I'll probably find it so tempting that I'll do a single sample test soon.

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Paul Baker (mailto:pbaker@parallax.com)
Propeller Applications Engineer
[/url][url=http://www.parallax.com] (http://www.parallax.com)
Parallax, Inc. (http://www.parallax.com)

Chris Savage
10-31-2006, 11:05 AM
Phillip,
·
·· The only problem I can see in that is you wouldn’t be able to tell if existing problems affected the test.

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Chris Savage
Parallax Tech Support