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View Full Version : Chatter A quick comparison of 32-bit RISC CPUs.



davidsaunders
12-20-2011, 04:31 PM
A quick comparison of the Propeller, ARM, and AVR32 CPUs. First a list of the features of each:

ARM:
+Conditional execution of any instruction.
+Fixed instruction size.
+Somewhat deterministic execution times for a given ARM.
+Simple external bus.
+Has many integrated peripherals (varies from ARM to ARM).
+Many development tools.
+A wide range of OSes.

AVR32:
+Good MPU.
+Has a reasonable set of integrated peripherals (varies from AVR32 to AVR32).
+Deterministic instruction execution times (most ops).
+Good external bus.

Propeller:
+Highly deterministic execution times.
+Highly deterministic IO behavior.
+Multicore by design.
+Nearly infinite software peripherals.
+No HW external memory bus.

The ARM is best in applications where processing power is of paramount importance, having multi BIPS cores available at very low prices. Also there are many manufactures of the ARM core.The AVR32 is a great MCU for low end applications that require an external bus and DRAM.The Propeller is a universal peripheral, or a great low to mid range system where you do not need the high speed DRAM bus, and 32 GPIOs are enough.Put simply a system may use all three of these beautiful RISC 32 bit CPUs together to great advantage.

davidsaunders
12-20-2011, 04:37 PM
I should to note that this is only related to CPUs that are commonly used by hobbyist developers. Though this also applies for these CPUs in commercial applications.

Heater.
12-20-2011, 07:09 PM
What are we trying to compare here, CPU's or microcontrollers? Given that MCUs have different CPUs and different target application spaces this is kind of nebulous.

Leon
12-20-2011, 07:14 PM
Which ARM core are you referring to? There are lots of them.

davidsaunders
12-20-2011, 07:15 PM
The CPUs that are at the center of MCUs. They are still CPUs, and if you strip out the extra HW no different to more standard CPUs of the same Architecture (with the notable exception being the Propeller).

davidsaunders
12-20-2011, 07:16 PM
@Leon: Hence why I stated Veries from ARM to ARM.

Leon
12-20-2011, 07:21 PM
It's a meaningless comparison, then.

davidsaunders
12-20-2011, 07:30 PM
The point of the comparison is to show that each device core has its own strengths and weaknesses in its own merit. An arm is a good efficient general purpose CPU. The ARM core has changed very little in its 26+ years of existence. Yes the newer ARM cores are SuperScaler, and often include a Thumb decoder (though not always), some of them even have an FPU. The only big change was the introduction of a 32bit address bus, and thus the moving of the status flags to a separate register from the Instruction Pointer (PC) register.

Yes this does mean that the execution timings do have to be calculated based on the core currently being used.

Heater.
12-20-2011, 08:03 PM
How is a single Propeller CPU (COG) different?
On the face of it a cog is simpler and slower than many other CPUs. No pipelines or caches to speed things up. No stack ops or pointer indexing etc, etc.

davidsaunders
12-20-2011, 08:26 PM
It is difficult to construct a system that has no provision for instruction fetch from RAM. Though given this I guess that there is not a good reason not to include a Propeller COG as equivalent, as it can access up to 32KB.

Heater.
12-20-2011, 08:35 PM
That's the thing. A cog by itself is a pretty brain damaged way to build a CPU. Can only directly execute 496 instructions, no stacks, no indexed addressing, no interrupts or DMA etc etc. None of those things CPUs have been expected to have for decades now.
But...put 8 of those together with the HUB and the direct connection to I/O pins and the magic starts to happen....

davidsaunders
12-20-2011, 08:52 PM
This is quite true. Of course remember that the ARM also has no direct stack handling (other than Pre/Post indexing ops).

Though While a cog is kind of useless by itself, it does have some things going for it, such as the counters, and high speed shifter used in video output. If you were to make a system based on a single cog it would be usable, for on thing there would be no waiting for a hub access, though rather just do the memory reads and writes when ever. And if you add a simple SRAM based MMU it would be a simple mater to use the hub ops to access many MB or even GB of RAM.