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Phil Pilgrim (PhiPi)
10-18-2011, 05:10 PM
The Propeller chip, with its DUTY mode counter output and sigma-delta ADC techniques has introduced many of us to signal processing in the "density domain." In this purely digital realm, analog voltages are represented by the percentage of time a signal is high. Using a simple low-pass filter, density signals can be converted to analog and, with a sigma-delta ADC back to density.

But, beyond that, signals can be processed directly in the density domain without conversion to analog or binary digital. Beginning earlier this year, Electronic Design (www.electronicdesign.com) published a series of articles by Dave Van Ess of Cypress Semiconductor that explores these possibilities. Because this signal-processing domain is of particular interest to Propeller users, I'm posting links to the articles here. Even with five installments, the author has to paint in rather broad brush strokes to cover the topic, so there's a lot to read between the lines. I recommend clicking the PRINT button above each article to read or print it out, since it will then occupy a single webpage, and figures will be shown full-size without having to display them in a separate window.


Part I (http://electronicdesign.com/article/analog-and-mixed-signal/Signal-Processing-In-The-Density-Domain-Part-I-.aspx)
Part II (http://electronicdesign.com/article/analog-and-mixed-signal/Signal-Processing-In-The-Density-Domain-Part-II-.aspx)
Part III (http://electronicdesign.com/article/analog-and-mixed-signal/Signal-Processing-In-The-Density-Domain-Part-III-.aspx)
Part IV (http://electronicdesign.com/article/analog-and-mixed-signal/Signal-Processing-In-The-Density-Domain-Part-IV-.aspx)
Part V (http://electronicdesign.com/article/analog-and-mixed-signal/Signal-Processing-In-The-Density-Domain-Part-V-.aspx)

Enjoy!

-Phil

ElectricAye
10-18-2011, 05:46 PM
I have no idea what this is, but because it has fallen from the wisdom-filled mouth of PhiPi, it must be pearls. I have dutifully bookmarked it for that reason.

I'm glad you post stuff like this. This is why I troll around here so much.

Thanks,
:-)

Phil Pilgrim (PhiPi)
10-18-2011, 07:53 PM
Capt. Quirk,

Thanks for the effort, but I think you will find that Penton Publications guards their copyrights vigorously, and posting it that way is a major copyright violation. I would recommend removing the attachment to keep Parallax out of hot water.

-Phil

Cluso99
10-19-2011, 01:04 AM
Nice articles Phil.
So, are you using them in your SDR (prop software defined radio)?

Peter Jakacki
10-19-2011, 02:24 AM
Real juice, yum! Thanks Phil.

EDIT: To quote from a Seinfeld episode "You're a very, very bad man!" ............ You're to blame, I'm not getting any work done, it's way too interesting :nerd:

Tracy Allen
10-19-2011, 03:24 AM
I was following that series too, with interest, but didn't have time to dig into it. Now to reconsider. Addition of densities thru me off right from the start, but I'm probably too "dense" and haven't seen it from the correct perspective.

I understand what happens when square waves are "added" via OR gates or XOR gates, but the addition that leads to the superposition equation does not immediately make sense:
86082
That proposes two pwm waveforms, each with its own percentage of time high, and each with its own average value. Then you "add" them with this rule: "The output is high when both inputs are high, and it’s low when both inputs are low. When a single input is high, the output is high for only half the duration." Well, that half-duration thing is quite a trick! That is not something our CTRx does naturally. Nor is it the standard logic result of an AND or OR or XOR gate between the two streams. Furthermore, consider a couple of cases:
Both waveforms same frequency same phase, 50% high and 50% low. They are right on top of one another, and the average value of the output equals the average of the averages of the inputs: (50% + 50%)/2 = 50%. Okay.
But what if they have opposite phases? Standard OR gate would be 100% high. Standard AND gate, 0%, XOR gate, 0%. However, by the above rule "one input only being high, half duration), we have the output of (25% + 25%)/2 = 12.5%, and that is somehow the contrived result of two 50% square waves.
How am I misunderstanding this? How is this contrived?

Suppose someone has a scheme to mix two audio waveforms by mixing the two density outputs from CTRA and CTRB. The only time they can superpose additively is if the densities are vanishingly small, so that the separate outputs are never or seldom high at the same time.

Peter Jakacki
10-19-2011, 03:58 AM
I understand what happens when square waves are "added" via OR gates or XOR gates, but the addition that leads to the superposition equation does not immediately make sense:
86082
That proposes two pwm waveforms, each with its own percentage of time high, and each with its own average value. Then you "add" them with this rule: "The output is high when both inputs are high, and itís low when both inputs are low. When a single input is high, the output is high for only half the duration." Well, that half-duration thing is quite a trick! That is not something our CTRx does naturally. Nor is it the standard logic result of an AND or OR or XOR gate between the two streams. Furthermore, consider a couple of cases:
Both waveforms same frequency same phase, 50% high and 50% low. They are right on top of one another, and the average value of the output equals the average of the averages of the inputs: (50% + 50%)/2 = 50%. Okay.
But what if they have opposite phases? Standard OR gate would be 100% high. Standard AND gate, 0%, XOR gate, 0%. However, by the above rule "one input only being high, half duration), we have the output of (25% + 25%)/2 = 12.5%, and that is somehow the contrived result of two 50% square waves.
How am I misunderstanding this? How is this contrived?


My understanding of "both high" or "both low" was that this boolean condition was then latched which would work fine except if they are perfectly out of phase with absolutely no overlap. Sorry, I will look at your post in more detail later, after I get some work done :)

Phil Pilgrim (PhiPi)
10-19-2011, 04:44 AM
I'm sure that one of the conditions for operating on tiwo density-domain signals is that they be statistically-independent. Otherwise "cross-product" terms will rear their ugly heads, rendering the operations meaningless. The author hints at this in Part V, when he writes whle discussing multiplication, "It is important that the two modulators are operated at different frequencies or are different types, such as pulse-width modulation (PWM) and delta-sigma modulation (DSM). If the same signal is fed into two exact modulators, both outputs would always be high or low and the XNOR product would always be high." I'm sure the same strictures apply to all operations in this domain. The devil in the details is how to maintain statistical independence throughout the density-domain "circuitry."

-Phil

Tracy Allen
10-19-2011, 05:20 AM
Or the opposite of statistical independence, in the following scheme.

Sample both streams with a common clock (probably a much higher frequency sampling clock) and allow one stream to determine only the first half of that high frequency period latched on the rising edge, and the second stream to determine only the second half latched on the falling edge. Then the two streams would be additive, distributive in the sense of p(A+B) = pA + pB. Is that what you think about the latching action Peter?

Maybe that is close to what van Ess is talking about. For quasi-static input streams, each cycle of sampling period will be either both halves high, both low, or 50%. That would make sense of the statement, "The output is high when both inputs are high, and itís low when both inputs are low. When a single input is high, the output is high for only half the duration." The thing is, I don't see any prominent mention of a need for a high frequency sampling clock. Would something like that be implied?