Precise pin sampling time ?

[godzich]

Pardon me if this has been discussed before (in that case - please someone redirect me into the right thread)...

For very precise fine tuned timing I cannot find enough info in the Prop data sheet. Assume a prop running at the standard 5MHz x 16 = 80 MHz internal clock. One instruction executes in 4 clocks = 50ns.

Consider the following PASM code:


WAITPEQ state, mask
MOV temp, ina


Execution continues immediately when the WAIPEQ condition is met. What I want to know is:

What is the delay time from when the condition is met (pins change) - to the sampling of the input pins in the next instruction? Is it 12.5ns, 25ns, 37.5ns, 50ns or more?

And is this delay constant? In other words: Is the waitpeq instruction sitting and waiting for the execution to continue based on 50ns or a smaller 12.5ns granularity? And when the execution continues, at which micro-state (50ns/4=12.5ns) is the actual sample taken to be written into temp?

Appreciate any input here, but prefer hard facts. Is this such information Parallax is sitting on?

Cheers,

Christian

[Peter Jakacki]

Parallax are not the sort of people that "sit on things" to hide them from us, they have always been very very open.

Now there are quite a few threads about this, did you search? Here is one thread with links to others that may help. You may find that there are a few timing gurus on the forum that can help with your questions.

http://forums.parallax.com/showthread.php?t=121773

EDIT: This is one of the links from the thread which may be of particular interest:
http://forums.parallax.com/showthread.php?p=862211

[kuroneko]

Yes, that topic comes up every now and then ;)

waitpxx samples with clock cycle accuracy, i.e. once primed you can get out at any cycle (not 4n granularity). The match cycle is followed by two cycles to get out. As for sampling live inputs, that happens during the e-phase. This delay is constant. SDwm.RSDeR. That's as hard as it gets. If you need timing diagrams (picture, words, 1000) let me know.

[Bean]

I have experimented with this a little bit. In my experience it is a 5 clock delay.

Bean