View Full Version : Propeller Chip and Cogs
03-20-2009, 01:17 AM
So I have not used the Propeller Chip before. But saw it and had some questions. When is says that it has 8 processors (cogs). What exactly does that mean? Does it mean that it can run different things at the same time? Like for instance producing sound through·2 piezo speaker at the same time. Unlike the Basic Stamp? How does that work?
AND there are no interrupts to deal with:)
There is a central clock... the only bottle neck is access to central RAM. The benchmark numbers are all wrong...
because each cog also has a configurable counter mechanism... which for some purposes is equivalent to adding
two more processors!!!
AND Prop is made, promoted and supported for complete idiots like me as well as for professional engineers. If you have any background at all...which I didn't... that background is immediately useful and will sort of determine how you approach the Prop.
Dan... long shot here... but did you ever serve in the Army?
03-20-2009, 01:58 AM
It's helpful to look at the block diagram for the Propeller (www.parallax.com/Portals/0/Downloads/docs/prod/prop/PchipBlockRev.pdf (http://www.parallax.com/Portals/0/Downloads/docs/prod/prop/PchipBlockRev.pdf)).
There are indeed 8 separate processors, each with two special purpose counters and each with a video generator. Each processor has access to all 32 I/O pins and each processor gets its own time slot for access to the shared RAM. Practically, you can access a 32 bit word in shared memory once every 3 instructions.
It's trivial to start up processors with a 5 or 6 line program to drive a piezo speaker, each processor driving one speaker with a different tone. The special purpose counters can each drive a speaker as well if you want for a total of 3 per cog.
03-20-2009, 02:06 AM
rj0_, no I have never served in the army.
How do you access the different Cogs?
You write the code that you intend to run on a cog as a callable routine and give that routine a name... you then use a command to start a cog and have it run that routine... couldn't be easier.
The syntax and the basic methodology are all explained in the learning labs... So, the first step is to get the education kit...
put it together and then go through the labs. If you do nothing else, you can get through the labs in a few days.
03-20-2009, 02:21 AM
Read the description of the following statements: COGNEW, COGINIT, COGSTOP, COGID.
The only way to access the cogs is via a program loaded into the cog's memory. One cog cannot access another cog's memory. Inter-cog communication is through shared (hub) memory areas. The COGNEW or COGINIT statements (really the same instruction internally) cause the cog's memory to be loaded from shared (hub) memory (ROM or RAM), then the cog's registers are cleared and execution started. Most programs are written in the Spin language which is interpreted by a program in the chip's ROM which is copied to a cog's RAM for execution.