View Full Version : Using 74HC597
Jonathan
08-09-2008, 09:27 PM
Hi All,
I need to use a 74HC597. I see the SW example of using the 74HC165, but the pinout of the '597 is different. Can anyone point me in the right direction for a connection diagram?
Also, what is the cosmic diff between the the two?
Thanks!
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Mike Green
08-09-2008, 09:47 PM
Download the datasheet from NXP (www.nxp.com/acrobat_download/datasheets/74HC_HCT597_CNV_2.pdf (http://www.nxp.com/acrobat_download/datasheets/74HC_HCT597_CNV_2.pdf)).
It looks like the biggest difference is that the parallel load is a level for the 74HC165 and is edge triggered for the 74HC597.
The pinouts are also different and there are some minor differences in the other signals.
Jonathan
08-09-2008, 09:55 PM
Mike,
I had already DL'd the data sheet. I'm just not sure which pins to use, and if the code should be the same etc. Are there any Stamp/Prop examples of using this chip?
Thanks!
Jonathan
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PJ Allen
08-09-2008, 10:51 PM
To shift data into the Stamp?
Jonathan
08-09-2008, 11:07 PM
Yes, to shift data in to the Stamp or Prop. The hookup diagrams I have found reference the load pin, but all the code examples I have found are in assembly for PICs etc.
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PJ Allen
08-09-2008, 11:09 PM
I think this would be the easiest implementation:
http://i270.photobucket.com/albums/jj118/new_clear_days/circuits/74HC597_imp.jpg
Jonathan
08-09-2008, 11:33 PM
PJ,
Lets see if I have this right, I would toggle SH(11) from low to high, then shift data in from Q(9) using L(12) as the clock? No need for a fourth I/O line? Other schematics I have seen use 4.
Thanks a ton for the help!
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PJ Allen
08-09-2008, 11:57 PM
No, no, no.
Do a PULSOUT (normally lo, goes hi then lo) to pin12, that locks what's on the data lines.· Then shift data in from Q using pin11 as the clock line.
As I noted, my sketch was for the easiest implementation.· If you want to clear the clock with MR then you'll need a pin for that and for PL.·
PJ Allen
08-10-2008, 09:33 AM
Reviewing datasheet --
1) PL has to be low when you latch the data.
2) PL (and MR) has to be made HI when you clock out data.
Post Edit -- dwg added
Post Edited (PJ Allen) : 8/10/2008 2:48:22 AM GMT
Jonathan
08-10-2008, 09:31 PM
PJ,
Got it working! Although I had to use 4 I/O to do it. I needed to strobe the latch hi/lo, then strobe the load line lo/hi.
Thanks for all the help. Now I have to figger out how to cascade 'em and I can get on with my project.
Jonathan
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Jonathan
08-10-2008, 10:15 PM
Got it working cascade style. One last question, can I get away with using 470kOhms for the input pulldowns? I have a lot on hand and I am a little low on 10ks. The inputs will be reading switches.
Thanks again for all the help!
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